The MIPS architecture port has been added 5+ years ago in order to
support a Chrome OS project that ended up going nowhere. No other board
has used it since and nobody is still willing or has the expertise and
hardware to maintain it. We have decided that it has become too much of
a mainenance burden and the chance of anyone ever reviving it seems too
slim at this point. This patch eliminates all MIPS code and
MIPS-specific hacks.
Change-Id: I5e49451cd055bbab0a15dcae5f53e0172e6e2ebe
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34919
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Add an entry for mb/supermicro/x11-lga1151-series and add myself to the
list of maintainers.
Change-Id: I634d251b4323c4f05edd553a9fa82e0f8c53773b
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36099
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
I haven't been active in coreboot, and coreboot-on-RISC-V in particular,
for quite a while, so let's update the MAINTAINERS file accordingly.
Change-Id: Ib65da0659ada94deed8756498a6948d1d1352ed0
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33619
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: ron minnich <rminnich@gmail.com>
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Since they're in charge of enforcing it, they should also get to see
when somebody attempts to change it.
Change-Id: I8c12dd0c27f7c3661e9755a5181db08563c8561f
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34393
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Add maintainers to the new vendorcode.
Change-Id: Ie3f99dd99c708f93bfcd19f52c57504e157e1eca
Signed-off-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33441
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Add maintainers to the new mainboard port.
Change-Id: I620ea424cc26fa0218a74052863ea30700789e1b
Signed-off-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33224
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Remove former Intel employee from maintainers of Braswell SoC.
Add 3mdeb and Eltan representatives as Braswell SoC maintainers.
Also mark Braswell SoC as maintained.
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Change-Id: Id815db60e3718bf141abcc7923ea073bbab4a516
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31673
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Reviewed-by: Piotr Król <piotr.krol@3mdeb.com>
And remove some maintainers that aren't even registered to Gerrit.
Change-Id: I3a753b60eab6d7939c37181760bcfb4bc6e75f65
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/c/29472
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: David Guckian
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This board runs well with coreboot. The documentation part of this
commit lists what works and what doesn't.
Tested with GRUB 2.02 as a payload, loading SeaBIOS 1.12.0 which then
boots FreeBSD 11.2. It has also been tested with GRUB directly booting
Debian GNU/Linux 9.6 (kernel 4.9).
Change-Id: I291573d4651bdffe24eb841033ea6189fcbf8502
Signed-off-by: Tristan Corrick <tristan@corrick.kiwi>
Reviewed-on: https://review.coreboot.org/c/30357
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Add myself as a maintainer of the four mainboards I ported. For those
which were added as a variant, add myself as a maintainer of the whole
mainboard group.
Change-Id: I0e1b54279027fae82ea9f2825e6f27d38ef3c746
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/29995
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Philipp has been reviewing and writing RISC-V-related code for a while.
Change-Id: I3f2d3a61f66343a6e0350909edfe466d2ee6c089
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/c/29980
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Reviewed-by: Philipp Hug <philipp@hug.cx>
POWER8 is a specific implementation of ppc64, which is by now outdated
(POWER9 has been on the market for a while). Rename arch/power8/ to
potentially cover a wider range of hardware.
TEST=Toolchains built before/after this commit can build coreboot for
emulation/qemu-power8 from before/after this commit.
Change-Id: I2d6f08b12a9ffc8a652ddcd6f24ad85ecb33ca52
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/c/29943
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Timothy Pearson <tpearson@raptorengineering.com>
The reason for this code cleanup is the legacy
Google Purin board which isn't available anymore
and AFAIK never made it into the stores.
* Remove broadcom cygnus SoC support
* Remove /util/broadcom tool
* Remove Google Purin mainboard
* Remove MAINTAINERS entries
Change-Id: I148dd7eb0192d396cb69bc26c4062f88a764771a
Signed-off-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/29905
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Add myself as a maintainer for legacy Intel-based ChromeOS devices
for which I provide coreboot images as a comminuty member, and
as a maintainer for Purism devices in a professional capacity.
Change-Id: I70df3b9e4e36c2e5d73f8888fe0ec220aa8a91b7
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/29913
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
The semantics in util/scripts/maintainers.go have changed in that a
file can be part of multiple components. This means that all files
are part of "the rest" now, which doesn't make much sense.
Change-Id: I220afe27e78aa5358fca61851242812f2d763992
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/29657
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Change-Id: Iae87a2e6f223f1d6e39034be4c8b511187eca6f5
Signed-off-by: Patrick Georgi <patrick@georgi.software>
Reviewed-on: https://review.coreboot.org/c/29782
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
* Remove FSP Sandy/Ivybrige which are unused.
* Open Source implementation isn't final but
good enough to replace FSP version.
* For new ports use NORTHBRIDGE_INTEL_IVYBRIDGE
and NORTHBRIDGE_INTEL_SANDYBRIDGE
Change-Id: I7b6bc4bfdd0481c8fe5b2b3d8f8b2eb9aa3c3b9e
Signed-off-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Reviewed-on: https://review.coreboot.org/29402
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
<vendor> seems to be confused about the meaning of our maintainers list.
I get the feeling some use it to organize corporate internal teams and
branches, adding names to the list that don't show up in Gerrit and even
if, often don't react to reviewing requests (within months). Maybe they
even don't know that this is about coreboot.org?
To clarify this:
o Add an introductory paragraph mentioning development on coreboot.org.
o Explicitly state that maintainers should be registered to Gerrit.
o If a topic is tagged as `Supported` or `Maintained`, expect that
somebody reacts to review requests.
Change-Id: I9ee038dc5ee1f4993ba1d230ef6e737f20e2ff8a
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/29471
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: David Guckian
This board doesn't support the newest RISC-V Privileged Architecture
spec (1.10), and it's based on an FPGA so it's a moving target.
Now that there's actual RISC-V silicon out there (from SiFive),
mb/lowrisc/nexys4ddr will only continue to bitrot.
Change-Id: I4e3e715106a1a94381a563dc4a56781c35883c2d
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/28706
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Hug <philipp@hug.cx>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Since ifdfake has been deprecated in favor of better alternatives, there
is no need to support it any further. Remove it from "util/", as well as
any leftover references in other files.
Change-Id: I45fe3d9fd606a61d5c3b9d0e6489a1df6d6510f0
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/28234
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Remove extra unnecessary space at end of line.
Change-Id: I27688c3b8df71b875f1dc1020465d838756362be
Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-on: https://review.coreboot.org/21521
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
I imported the LZ4 compression code and want to keep an eye on it to
ensure that our sources stay in sync with upstream.
Change-Id: I249ce24f6630d66d451d993198cd267478e5743e
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/21488
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
I sent out an email to all of the maintainers asking to verify their
status.
- The email I sent to Marcin Wojciechowski bounced, so I'm removing the
Little Plains mainboard support.
- I'm removing myself from areas that I'm not currently maintaining.
- Due to Damien's schedule, he asked that the level for his pieces be
changed from "Maintained" to "Odd Fixes".
I've added a list of infrastructure owners and backup owners - This is
strictly informational.
Change-Id: I39715611e8025bb535cdf1012be2bf05bf91fdaa
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/20400
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Damien Zammit <damien@zamaudio.com>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Update my email address for Apollolake and FSP 2.0 driver. Also
downgrade support from "supported" to "maintained" as currently
no other Intel persons are assigned for the role.
Change-Id: I3033fc5ec8b0882ce79eeb15ee3eb13a228611a4
Signed-off-by: Andrey Petrov <andrey.petrov@intel.com>
Reviewed-on: https://review.coreboot.org/20550
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
I'm pretty much already doing this anyway, so I might as well document
it. Separating out some older ARM SoCs that were added by other people
and are pretty much orphaned now.
I can also fill out the MISSING: MEMLAYOUT point (since I wrote that).
Change-Id: I8b78d592a1ed68a42e5785ebdc13df2edf9007bf
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/20137
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
<https://coreboot.org> is redirected to <https://www.coreboot.org>.
```
$ curl -I https://coreboot.org
HTTP/1.1 301 Moved Permanently
Server: nginx/1.8.1
Date: Mon, 05 Jun 2017 10:41:33 GMT
Content-Type: text/html
Content-Length: 184
Connection: keep-alive
Location: https://www.coreboot.org/
```
So use the command below to use the final location to save a redirect.
```
$ git grep -l https://coreboot.org \
| xargs sed -i 's,https://coreboot.org,https://www.coreboot.org,g'
```
Change-Id: I4176c20ef31399f0063b41e3a0029cca0c1b0ff3
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: https://review.coreboot.org/20035
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
The coreboot sites support HTTPS, and requests over HTTP with SSL are
also redirected. So use the more secure URLs, which also saves a
request most of the times, as nothing needs to be redirected.
Run the command below to replace all occurences.
```
$ git grep -l -E 'http://(www.|review.|)coreboot.org'
| xargs sed -i 's,http://\(.*\)coreboot.org,https://\1coreboot.org,g'
```
Change-Id: If53f8b66f1ac72fb1a38fa392b26eade9963c369
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: https://review.coreboot.org/20034
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
- Fix whitespace: Change some spaces to tabs
- Add myself as an abuild maintainer
- Add util/xcompile and util/genbuild_h to the BUILD SYSTEM section
- Add new sections for utilities: docker, toolchain, and git
- Remove GENERIC DRAM section
- Remove the mailing list. We don't want it to be added as a reviewer.
Change-Id: I78692fcac174d7b7c4d65911c85e4e2dacefcfc0
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/18578
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Change-Id: I53ba5ba790ae683082e712dc0b92f1ac5bf27ddb
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/16990
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Alexander Couzens <lynxis@fe80.eu>
The mainboard is not being worked on anymore, not available outside of
Intel and thus has litle practical use. Remove mainboard code completely.
Change-Id: Ic2c7ea3810ee70afc01a42786f8ccba9313134e4
Signed-off-by: Andrey Petrov <andrey.petrov@intel.com>
Reviewed-on: https://review.coreboot.org/16725
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Lijian Zhao <lijian.zhao@intel.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Add Intel Broadwell-DE SOC and Camelback Mountain CRB to the list
Change-Id: I3f0c3ae8b38ecf3c3676fe497ade8b74ba94485d
Signed-off-by: York Yang <york.yang@intel.com>
Reviewed-on: https://review.coreboot.org/14382
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Arthur Heymans