Commit graph

10 commits

Author SHA1 Message Date
Stefan Reinauer
6a00113de8 Rename __attribute__((packed)) --> __packed
Also unify __attribute__ ((..)) to __attribute__((..)) and
handle ((__packed__)) like ((packed))

Change-Id: Ie60a51c3fa92b5009724a5b7c2932e361bf3490c
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/15921
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-07-13 19:45:59 +00:00
wxjstz
05782384a7 riscv: Update the gcc built-in macro __riscv__
The architecture is determined by __riscv__ in the LZ4_copy8 function
(located in src / commonlib / lz4_wrapper.c). __riscv exists in gcc7.1.1.
But __riscv__ does not exist.

Change-Id: I38fd41da9afd76c254f0c3d6984579c3790e5792
Signed-off-by: XiangWang <wxjstz@126.com>
Reviewed-on: https://review.coreboot.org/20125
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Andrew Waterman <aswaterman@gmail.com>
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
2017-07-01 00:29:38 +00:00
Lee Leahy
49fd42dc65 commonlib: Wrap lines at 80 columns
Fix the following warning detected by checkpatch.pl:

TEST=Build and run on Galileo Gen2

Change-Id: I811763c6de57dfdf5456579f63e83dca29d37d61
Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Reviewed-on: https://review.coreboot.org/18751
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2017-03-13 21:23:21 +01:00
Lee Leahy
72c60a472b commonlib: Fix issues with { } and else
Fix the following errors and warning detected by checkpatch.pl:

ERROR: open brace '{' following struct go on the same line
ERROR: else should follow close brace '}'
WARNING: else is not generally useful after a break or return

False positives are detected for the following checkpatch.pl error.
ERROR: that open brace { should be on the previous line
These false positives are in cbfs.c for two function definitions.

TEST=Build and run Galileo Gen2

Change-Id: Ic679ff3a2e1cfc0ed52073c20165e05bf21d76f3
Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Reviewed-on: https://review.coreboot.org/18750
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)
2017-03-10 22:27:18 +01:00
Benjamin Barenblat
82ef8ada82 src/commonlib/lz4_wrapper: Correct inline asm for unaligned 64-bit copy
Rewrite inline assembly for ARMv7+ to correctly annotate inputs and
outputs.  On ARM GCC 6.1.1, this causes assembly output to change from
the incorrect

	@ r0 is allocated to hold dst and x0
	@ r1 is allocated to hold src and x1
	ldr r0, [r1]		@ clobbers dst!
	ldr r1, [r1, #4]
	str r0, [r0]
	str r1, [r0, #4]

to the correct

	@ r0 is allocated to hold dst
	@ r1 is allocated to hold src and x1
	@ r3 is allocated to hold x0
	ldr r3, [r1]
	ldr r1, [r1, #4]
	str r3, [r0]
	str r1, [r0, #4]

Also modify checkpatch.pl to ignore spaces before opening brackets when
used in inline assembly.

Change-Id: I255995f5e0a7b1a95375258755a93972c51d79b8
Signed-off-by: Benjamin Barenblat <bbaren@google.com>
Reviewed-on: https://review.coreboot.org/15216
Tested-by: build bot (Jenkins)
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-06-24 19:10:05 +02:00
Jonathan Neuschäfer
4acb0e7742 commonlib/lz4: Avoid unaligned memory access on RISC-V
From the User-Level ISA Specification v2.0:

   "We do not mandate atomicity for misaligned accesses so simple
    implementations can just use a machine trap and software handler to
    handle misaligned accesses." (— http://riscv.org/specifications/)

Spike traps on unaligned accesses.

Change-Id: Ia57786916f4076cc08513f4e331c2deec9cfa785
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/14983
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-05-31 21:07:03 +02:00
Vladimir Serbinenko
ca1b2d19a9 lz4_wrapper: Use __asm__ rather than asm.
__asm__ is more robust to compilation flags.

Change-Id: Ic7ca6e38ddd439dcfc4a62ef272ecea62416b4be
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: https://review.coreboot.org/13905
Tested-by: build bot (Jenkins)
Reviewed-by: Julius Werner <jwerner@chromium.org>
2016-03-05 00:56:53 +01:00
Werner Zeh
116485a634 cbfs: Fix compiler error for gcc versions < 4.6
The missing braces for access to a union member
cause an error on gcc versions < 4.6.

Change-Id: I7de14a6d89219f5376f4f969adecfe8014a5a9d8
Signed-off-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-on: https://review.coreboot.org/13776
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-02-25 06:17:52 +01:00
Paul Menzel
87fe2360c4 commonlib/lz4_wrapper: Use correct casts to ensure valid calculations
Commit 09f2921b (cbfs: Add LZ4 in-place decompression support for
pre-RAM stages) breaks building cbfstool with gcc (Debian 4.9.2-10)
4.9.2 in Debian 8.3 (jessie) with a 32-bit user space. It works fine
in a 64-bit user space.

```
/home/joey/src/coreboot/src/commonlib/lz4_wrapper.c:164:18: note: in expansion of macro 'MIN'
    size_t size = MIN((uint32_t)b.size, dst + dstn - out);
                  ^
/home/joey/src/coreboot/src/commonlib/include/commonlib/helpers.h:29:35: error: signed and unsigned type in conditional expression [-Werror=sign-compare]
 #define MIN(a,b) ((a) < (b) ? (a) : (b))
                                   ^
```

The problem is arithmetic on void*, so explicitly cast to the wanted
types as suggested by user *redi* in #gcc@irc.freenode.net.

Change-Id: I85bee25a69c432ef8bb934add7fd2e2e31f03662
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: https://review.coreboot.org/13771
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)
2016-02-24 19:26:49 +01:00
Julius Werner
09f2921b5d cbfs: Add LZ4 in-place decompression support for pre-RAM stages
This patch ports the LZ4 decompression code that debuted in libpayload
last year to coreboot for use in CBFS stages (upgrading the base
algorithm to LZ4's dev branch to access the new in-place decompression
checks). This is especially useful for pre-RAM stages in constrained
SRAM-based systems, which previously could not be compressed due to
the size requirements of the LZMA scratchpad and bounce buffer. The
LZ4 algorithm offers a very lean decompressor function and in-place
decompression support to achieve roughly the same boot speed gains
(trading compression ratio for decompression time) with nearly no
memory overhead.

For now we only activate it for the stages that had previously not been
compressed at all on non-XIP (read: non-x86) boards. In the future we
may also consider replacing LZMA completely for certain boards, since
which algorithm wins out on boot speed depends on board-specific
parameters (architecture, processor speed, SPI transfer rate, etc.).

BRANCH=None
BUG=None
TEST=Built and booted Oak, Jerry, Nyan and Falco. Measured boot time on
Oak to be about ~20ms faster (cutting load times for affected stages
almost in half).

Change-Id: Iec256c0e6d585d1b69985461939884a54e3ab900
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/13638
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-02-22 21:38:37 +01:00