With the move to FSP 2.0 the number of VR types supported was
reduced to 4, and the VR_RING type is no longer present.
This means all existing boards using FSP 2.0 are incorrectly
passing VR configuration into FSP as the values corresponding to
"GT Sliced" and "GT Unsliced" have changed.
Fix this by updating the skylake SOC VR handling to account for
changes in the FSP configuration and no longer provide VR_RING
type when using FSP 2.0.
BUG=b:36228330
BRANCH=none
TEST=manual: build and boot on Eve
Change-Id: I59eea9fba006a4c235d7b42d07fdc6e4f44f7351
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://review.coreboot.org/18818
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins)
Add support for Kaby Lake RVP7 board
* Add RVP7 board support in Kconfig
* Override default descriptor and ME binary paths in Kconfig
since those binaries will differ for RVP3 and RVP7
* Add RVP7 board name in board_info.txt and Kconfig.name
* Add devicetree.cb for RVP7 in the variants path
* Add gpio.h for RVP7 in variants/include/variant path
* Made board specific code for retrieving spd, i.e., in RVP7
there is non-soldered DIMMs, so SPD is read through smbus,
unlike RVP3 where memory DIMMs are soldered down with board.
Hence for RVP3, the spd binaries will be fixed and can be
kept as binary file in cbfs.
BUG=none
BRANCH=none
TEST=Built and boot Kaby Lake RVP7
Change-Id: I6f3d17d857bad1b5cf39f0bc900c760fee72da48
Signed-off-by: Barnali Sarkar <barnali.sarkar@intel.com>
Reviewed-on: https://review.coreboot.org/17637
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Add support of Variant board model for existing intel/kblrvp,
since there might be more RVP board supports under
intel/kblrvp. Existing is for KBL RVP3 board.
BUG=none
BRANCH=none
TEST=Built and boot Kaby Lake RVP3
Change-Id: I041a07a273dbb77e422d48591f06b5f1011cd9f7
Signed-off-by: Barnali Sarkar <barnali.sarkar@intel.com>
Reviewed-on: https://review.coreboot.org/17630
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)
