Commit graph

2 commits

Author SHA1 Message Date
Frans Hendriks
863853cd2d soc/intel/braswell/smbus.c: Add support for i2c mode block write
Intel Braswell supports i2c block write using SMBus controller.

smbus_i2c_block_write() is added to configure SMBus controller in i2c
mode before calling do_i2c_block_write().

Add smbus.c to ramstage.

BUG=N/A
TEST=Verify LCD display is working on Facebook FBG-1701

Change-Id: I50c1a03f624b3ab3b987d4f3b1d15dac4374e48a
Signed-off-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33225
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2019-06-20 15:41:37 +00:00
Michał Żygowski
1119428693 soc/intel/braswell/smbus: Enable early SMBus in romstage
Enable early SMBus support compatible with SPD library using Intel SB
common SMBus API.

TEST=boot Protectli FW2B with new FSP, MemoryInit should pass without
errors

Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Change-Id: I92a2c5a6d0b38e5658cfdc017041f12717dabdd5
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32062
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2019-05-10 15:13:07 +00:00