161 commits

Author	SHA1	Message	Date
Arthur Heymans	0c67a66d23	sb/intel/i82801jx: Remove dead code ... Setting up default BARs and DMI init code is done in northbridge code. Change-Id: I6cfa3018ca7f5ef351415c4ec6e178ade353f7a7 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/20906 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>	2017-08-10 16:00:59 +00:00
Arthur Heymans	d4ce1ded01	sb/intel/i82801jx: Add romstage smbus and i2c block operations ... Change-Id: I76bf1ed392d3d18059792106fc482d2259a3f084 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/20880 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>	2017-08-07 06:59:09 +00:00
Arthur Heymans	16fe79048f	sb/intel/*: Use common SMBus functions ... All Intel southbridges implement the same SMBus functions. This patch replaces all these similar and mostly identical implementations with a common file. This also makes i2c block read available to all those southbridges. If the northbridge has to read a lot of SPD bytes sequentially, using this function can reduce the time being spent to read SPD five-fold. Change-Id: I93bb186e04e8c32dff04fc1abe4b5ecbc4c9c962 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/19258 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>	2017-08-06 23:26:15 +00:00
Arthur Heymans	e5c8077c94	sb/intel/i82801jx: Add Interrupt pin and routing RCBA offsets macros ... Change-Id: If8e82a291f666d5f310422b100f02d5df17ab74e Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/19255 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>	2017-07-25 15:15:41 +00:00
Arthur Heymans	87af36ac17	sb/intel/i82801jx: Route all PIRQ to INT11 ... Interrupt 11 is not used by legacy devices and so can always be used for PCI interrupts. Full legacy IRQ routing is complicated and hard to get right. Change-Id: I6c718f4b9fb91ffcc4a136120581a4fcd7ec7231 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/19254 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>	2017-07-25 15:15:28 +00:00
Arthur Heymans	ad5014952b	sb/intel/i82801jx: Generate default fadt and madt ... Function copied from i82801gx with offsets fixed for i82801lx. Change-Id: Ib420c69470c3190cc1eac234ce68a18382fbc04a Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/19253 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>	2017-07-24 15:09:27 +00:00
Arthur Heymans	41114650d0	sb/intel/i82801jx: Add function to detect s3 resume ... File copied from i82801gx. Change-Id: I107087b6448f18b6a5ae21c2ae0392c057dd23b2 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/19252 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Martin Roth <martinroth@google.com>	2017-07-23 20:34:11 +00:00
Arthur Heymans	e5dcaf1269	sb/intel/i82801jx: Add addition IO resources ... Adapted from i82801gx. Change-Id: I9108a45135908b7c4e74e9df3bb8f89f55893299 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/19251 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Martin Roth <martinroth@google.com>	2017-07-23 20:33:34 +00:00
Martin Roth	b137c13e57	I82801JX: Add IS_ENABLED around config options ... This chipset was just added and had a few places that needed to be fixed. Change-Id: Ief048c4876c5a2cb538c9cb4b295aba46a4fff62 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/20684 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>	2017-07-21 17:00:01 +00:00
Arthur Heymans	349e08535a	sb/intel/i82801jx: Add correct PCI ids and change names ... Change-Id: Ic9226098dafa2465aa5fccc72c442de2b94e44c7 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/19249 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>	2017-07-21 15:44:19 +00:00
Arthur Heymans	7b9c139ac2	sb/intel/i82801jx: Copy i82801ix ... Change-Id: I878960e7e0f992426382ca717b8b42787f01ebc6 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/19248 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>	2017-07-21 15:43:18 +00:00