This patch fixes the table issue in markdown file identified with commit
96481066 (Documentation: gpio: Update table as per coreboot guidelines).
BUG=b:211573253, b:211950520
Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: Ifd8265b92b5ef0dcabb754371591477ca19c39be
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63177
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
The "Getting started" section is not an appropriate place for the
documentation license. It should rather be listed in the main menu.
Thus, move it there.
Change-Id: I8bfc4f52da8a93d78a62e3a68fd6f1dc8ae4d335
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62767
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
This change mostly changes links that were identified as broken by
the 'website_scans' jenkins job.
There were some links that seem to be up at times, but that are
identified by link-checker as broken because of SSL issues.
At least one other link was changed to point to archive.org so
that it doesn't break at some point in the future. We should
probably try to make sure that everything is archived there and
point to those versions when possible.
There are still lots more links to do.
Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: I36868ddf6113e18fa6841427dd635c75445b7bef
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62672
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
There is no need that the tutorial for flashing firmware has its own
point in the main menu. Thus, move it to the tutorial section.
Change-Id: Ife6d97254af4c006fe01480a78c76303f9cb34bb
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62424
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Thomas Heijligen <src@posteo.de>
In preperation for CB:62424, replace HTTP links pointing to the flashing
firmware tutorial with file paths to the Markdown files.
Change-Id: I6a271a912348cbe002bc9cced9922ed743e1133c
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62452
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Thomas Heijligen <src@posteo.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
While running Sphinx, it shows the warning "document isn't included in
any toctree" for the documents checklist.md and templates.md. These are
not meant to be listed in ToC trees.
Thus, mark them as orphaned to exclude them from ToC trees.
Change-Id: I1ff8f7c24ac9b3c3a120914c0c72ab73e85c4873
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62584
Reviewed-by: Thomas Heijligen <src@posteo.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
The QEMU POWER9 target is supported since coreboot version 4.15.
Documentation is available in the tree, but it's not referenced from
the mainboard index page. Fix that.
Change-Id: Ic3b98735840c146cb0bfb122df0e6f762c2beeca
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62451
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Fix spelling and use the one from their website qemu.org.
Change-Id: I36a88985ce3a7c59b732c1ca3198d86a591de6bd
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62450
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
The Supermicro X9SAE target is supported since coreboot version 4.15.
Documentation is available in the tree, but it's not referenced from
the mainboard index page. Fix that.
Change-Id: I5d3d0b5b935f1a3ea353a3d9e39208db7c7895ef
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62449
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Fix the spelling and use the one from their website supermicro.com
Change-Id: Id630d9d130082fb38f9151e0dfb6f6fbb5a2789d
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62448
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Move the instructions for flashing coreboot with fwupd to common
directory as the process is identical across all models and variants.
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: I293acf962b32c81fdf482e0df15363e1cffa39bd
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62300
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
There is no reason to use lists to link the checklist and template
document. Thus, link to these documents in their related flowing text.
Change-Id: I9bce0dd6595f1a208e7ea2311a653f9af32530de
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62412
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
The list of releases will grow and in the current state each release
moves the section for the upcoming release more down making it less
visible.
Thus, switch both sections, so that the documentation for the
upcoming release is at the top. Also, invert the order of the previous
releases, so that the latest is at the top.
Change-Id: I69987e035f38ae3ca14dbf5c7644d5292106a978
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62411
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
The documents for the checklist and template are related to upcoming
releases. Thus, move them to the section for upcoming releases.
Change-Id: Ibe6be506d2833036105b7c86445dca2a6efb7a55
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62410
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
The release notes document also contains information about upcoming
releases, not only previous releases. Thus, rename the document in the
main menu and give it a proper title.
Change-Id: I4480c0b6e4be6fcbcb9a00beb0be169a7eed435d
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62409
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
The Gerrit Guidelines are related to the contributing process and also
contain documentation which goes beyond "Getting started". Thus, move
them to the "Contributing" section.
Change-Id: I775a79c14562a1f4a9563012aee3b690c0635cc1
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62386
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
- Remove arrows from google mainboard as requested in the last review.
- Make Feb25 the release date.
- Cosmetic markdown changes - Rewrapping, updated for lines' lengths.
- Add plan to support Resource allocator V3 on the 4.18 branch.
- Add plan to deprecate LEGACY_SMP_INIT after 4.18 release
Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: Id16925918511fd2277a54faeccfa56e96c6aaae5
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62380
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Update list of boards that support vboot.
Change-Id: I7f372c5b923018bc1b744fd02d5acc976b03742a
Signed-off-by: Jason Glenesk <jason.glenesk@amd.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62310
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Clean up the main menu by adding a new entry `Contributing` and moving
all related menu entries below it.
Change-Id: I04ec8a568b716df48ae7f8f826826e8753f5f88b
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62220
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Clean up the main menu by adding a new entry `Community` and moving all
related menu entries below it.
Change-Id: Ib5df0156edaa739f15e6da8489968448876e1894
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62219
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Replace HTTP links with paths to Markdown files where possible.
Change-Id: I0ecca6460105b10b81c4fc014f00235b5d9b861c
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62205
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Fix formatting when text should be bold.
Change-Id: I7a88ddc0a56dba8c05d0997f37121d0f2cc84ce6
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62204
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Add a site containing general information for GSoC contributors and
mentors. It was initially copied from https://www.coreboot.org/GSoC.
Change-Id: I5c21d026118cba571dc6b817e89cc4da296a1799
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61791
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Add an option to build skiboot as a payload. This makes QEMU Power9
board simpler to use as skiboot is necessary anyway.
Change-Id: I0b49ea7464c97cc2ff0d5030629deed549851372
Signed-off-by: Igor Bagnucki <igor.bagnucki@3mdeb.com>
Signed-off-by: Krystian Hebel <krystian.hebel@3mdeb.com>
Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58656
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>
This patch documents the recommendation as per Intel GPIO BWG on
GPIO PAD lock configuration.
As per GPIO BWG, it's recommended to change the Pad Reset Config
for lock GPP as `Power Good` so that pad configuration and lock
bit can be reset at the same time.
Refer to Intel doc:630603 for details.
Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: I3faf5dfc28c8c2dbc322db80a59f44a29002673c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61000
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
apcb_v3_edit.py tool edits APCB V3 binaries. Specifically it will inject
up to 16 SPDs into an existing APCB. The APCB must have a magic number
at the top of each SPD slot.
BUG=b:209486191
BRANCH=None
TEST=Inject 4 SPDs into magic APCB, boot guybrush with modified APCB
Change-Id: I9148977c415df41210a3a13a1cd9b3bc1504a480
Signed-off-by: Rob Barnes <robbarnes@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60281
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
This adds a new port for the ASRock H77 Pro4-M motherboard. It is
microATX-sized with an LGA1155 socket and four DIMM sockets for DDR3
SDRAM.
The port was initially done with autoport. It is quite similar to the
ASRock B75 Pro3-M which is already supported by coreboot.
Working:
- Sandy Bridge and Ivy Bridge CPUs (tested: i5-2500, Pentium G2120)
- Native RAM initialization with four DIMMs of two different types
- PS/2 combined port (mouse or keyboard)
- Integrated GPU by libgfxinit on all monitor ports (DVI-D, HDMI, D-Sub)
- PCIe graphics in the PEG slot
- All three additional PCIe slots
- All rear and internal USB2 ports
- All rear and internal USB3 ports with reasonable transfer rates
- All six SATA ports from the PCH (two 6 Gb/s, four 3 Gb/s)
- All two SATA ports from the ASM1061 PCIe-to-SATA bridge (6 Gb/s)
- Rear eSATA connector (multiplexed with one ASM1061 port)
- Console output on the serial port of the Super I/O
- SeaBIOS 1.15.0 to boot slackware64
- SeaBIOS 1.15.0 to boot Windows 10 (needs VGA BIOS)
- Internal flashing with flashrom-1.2 (needs `--ifd -i bios --noverify-all`)
- External flashing with flashrom-1.2 and a Raspberry Pi 1
- S3 suspend/resume from either Linux or Windows 10
Not working:
- Booting from the two SATA ports provided by the ASM1061
- Automatic fan control with the NCT6776D Super I/O
Untested:
- VBT (it is included, though)
- Infrared header
Change-Id: Ic2c51bf7babd9dfcbaf69a5019b2a034762052f2
Signed-off-by: Michael Büchler <michael.buechler@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45317
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Use ed25519 keys because recent changes to RSA keys in OpenSSH are
making a mess.
Also update references to the Gerrit UI to match the current version.
Change-Id: Ib13836feb6968307d2c8b3022cb0c859dac89bb8
Signed-off-by: Patrick Georgi <patrick@coreboot.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59806
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
CPLD can be used for board revision determinition.
Remove info about selecting memory type and add Rev 1.4 info
BUG = N/A
TEST = NA
Change-Id: I4bc851f72ae03e98ab1b2e0e04b07ccf6135ebeb
Signed-off-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59756
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Subrata Banik