Commit Graph

590 Commits

Author SHA1 Message Date
Patrick Georgi 69cb494749 Documentation: List the leadership meeting as one of our forums
Change-Id: I00822cc631c5451862bd94683ff45289ecc75679
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52264
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jan Dabros <jsd@semihalf.com>
2021-04-15 19:11:01 +00:00
Ravi Kumar Bokka 0c9eb31533 sc7280: Provide initial SoC support
BUG=b:182963902
TEST=Validated on qualcomm sc7280 developement board

Change-Id: I1fc841b3113f2bf79b8376cd1ccdb671c53c2084
Signed-off-by: T Michael Turney <mturney@codeaurora.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45205
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Shelley Chen <shchen@google.com>
2021-04-15 19:07:26 +00:00
Jonathan Zhang e73bae7b0a Documentation/mb/ocp: Update Delta Lake documentation
Update OCP Delta Lake documentation following OSF (Open System Firmware)
solution reaching DVT exit parity. This alternative host firmware
solution uses FSP/coreboot/Linuxboot stack.

Signed-off-by: Jonathan Zhang <jonzhang@fb.com>
Change-Id: Ifd6ab251cd7806cf8cd3f984ad88c091f85035cf
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51824
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2021-04-15 07:37:46 +00:00
Piotr Szymaniak 5b5b8afdf1 Docs/mb/lenovo/t420: List working, tested and non-working features
Signed-off-by: Piotr Szymaniak <szarpaj@grubelek.pl>
Change-Id: I6fb4a8da44125b4280d37d0cf7c372f8024fb2d1
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51952
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-04-06 06:47:29 +00:00
Michael Niewöhner 0887fc4dbc docs/mb/supermicro: add SUM tool for flashing with disabled ME
Change-Id: I08543c0908a6cb4ef9fb46d0eb3a7aa481fb95d9
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49887
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-04-03 20:25:44 +00:00
Matt DeVillier fcb68f31b6 mb/purism/librem_14: Move/fix touchpad interrupt GPIO
On production boards, the touchpad interrupt line was moved
from GPP_B20 to GPP_B3. Fix the GPIO pad config and devicetree entry,
and update documentation to remove touchpad config issue.

Change-Id: Iaefeba8f78c567b67e7a416c27299bff574c23ab
Signed-off-by: Matt DeVillier <matt.devillier@puri.sm>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51797
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-03-28 16:05:57 +00:00
Matt DeVillier 385667f679 documentation: Add documentation for Purism Librem 14
Change-Id: Ic68a3d17534f78dae8c432253982e8d10a6427f0
Signed-off-by: Matt DeVillier <matt.devillier@puri.sm>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51550
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-03-28 16:05:51 +00:00
Julius Werner 4dd857723b Documentation/coding_style: Issues not mentioned and cleanup patches
This patch adds a bit of a "preamble" to the coding style to provide
guideance on how it should be applied and how style questions that
aren't mentioned should be handled.

Signed-off-by: Julius Werner <jwerner@chromium.org>
Change-Id: I88efd5f1006bd1fd82cea14ea65422d9958dc197
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50966
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2021-03-26 05:09:40 +00:00
Tim Crawford 427487b173 mb/system76/gaze15: Add System76 Gazelle 15
Tested with TianoCore payload (UefiPayloadPkg).

Working:

- PS/2 keyboard, touchpad
- Both DIMM slots
- Both NVMe ports
- SATA port
- All USB ports
- Webcam
- Ethernet
- Integrated graphics using Intel GOP driver
- Internal microphone
- Internal speakers
- S3 suspend/resume
- Flashing with flashrom
- Booting to Ubuntu Linux 20.10 and Windows 10

Not working:

- Discrete/Hybrid graphics

This requires a new driver to work correctly, which will be added and
enabled later.

Change-Id: I10667fa26ac7c4b8eb67da11f3e963062bd0db47
Signed-off-by: Jeremy Soller <jeremy@system76.com>
Signed-off-by: Tim Crawford <tcrawford@system76.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47822
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-03-24 07:53:40 +00:00
Julius Werner 698b05fdd5 Documentation/coding_style: Add more details on include-ordering
This patch is trying to address some of the concerns raised in CB:50247
after the patch had landed. The preference for alphabetized headers was
just supposed to discourage leaving headers completely unordered, and
wasn't intended to disallow other intentional include orderings such as
grouping local includes after system ones or specific ordering
constraints that exist for technical reasons. This patch adds a few more
sentences to try to clarify that.

Signed-off-by: Julius Werner <jwerner@chromium.org>
Change-Id: I6825f4a57613fabb88a00ae46679b4774ef7110b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51553
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2021-03-22 11:30:13 +00:00
Jakub Czapiga 61fcb7e965 acpi/acpigen.h: Add more intuitive AML package closing functions
Until now every AML package had to be closed using acpigen_pop_len().
This commit introduces set of package closing functions corresponding
with their opening function names. For example acpigen_write_if()
opens if-statement package, acpigen_write_if_end() closes it.
Now acpigen_write_else() closes previously opened acpigen_write_if(),
so acpigen_pop_len() is not required before it.

Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Change-Id: Icfdc3804cd93bde049cd11dec98758b3a639eafd
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50910
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lance Zhao
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-03-22 11:21:55 +00:00
Kevin Chiu 4490689d88 google/trogdor: Add new variant Marzipan
This patch adds a new variant called Marzipan that is identical to Lazor
for now.

BUG=b:182181519,b:182018606
BRANCH=master
TEST=make

Change-Id: I92b667c63b0a06255d1e9511d7486293d8b4426a
Signed-off-by: Kevin Chiu <kevin.chiu@quantatw.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51618
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2021-03-20 01:31:06 +00:00
Angel Pons da12ca98c9 doc/mb/lenovo/montevina: Update link within page
Commit c4aa24fc12 (doc/mb/lenovo/montevina: Clarify use of bincfg)
renamed a section, and the link referencing it by its old title no
longer works. Update the link, and remove the `a completely new one`
part from it as well, for consistency with the aforementioned commit.

Change-Id: I22e8b3237dafb3397bc901804a57e905f806839d
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51482
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2021-03-19 12:46:06 +00:00
Patrick Georgi ce9b26cdd5 Documentation/releases: Add note about CBFS stage format change
Change-Id: I2e4f1d1551141c6225e762631e52d71357112425
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51562
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2021-03-18 08:21:02 +00:00
Patrick Georgi a763e8f92b Documentation: Describe the site-local hook in our config/build system
Change-Id: Ia682b784540fa82e1f216f76d87d59a4f0b94486
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51546
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-03-17 23:07:07 +00:00
Furquan Shaikh 82dcd5b9ba Documentation: Add deprecation notice for SAR support in VPD
This change updates the release notes for coreboot-4.14 to add
deprecation notice for SAR support in VPD for Chrome OS platforms.

BUG=b:173465272

Change-Id: If6d511a22a3a2a31671dac91e57e801134d4ecf8
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51486
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-03-17 07:56:39 +00:00
Alexander Couzens 1295fa218f mb/supermicro/x11-lga1151-series: add support of X11SSH-LN4F to X11SSH-F
The X11SSH-LN4F and X11SSH-F are very similiar. They both use the same
PCB and use the same Supermicro BIOS ID. The X11SSH-LN4F has 4 NICs in
difference to the X11SSH-F which only has 2 NICs. The two additional
NICs aren't populated on the X11SSH-F. Enable the PCIe root ports
connected to the two additional Intel NICs.

Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
Change-Id: Id4e66be47ceef75905ba760b8d5a14284e130f63
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51330
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
2021-03-15 09:45:23 +00:00
Nico Huber 3b14a5f92a doc/mb/lenovo/montevina: Fix constants for 16MiB flash
The current values are actually for 32MiB and result in a brick if used
with a 16MiB chip because of the invalid bios region.

Change-Id: I08337394ce0d6e31e5c03cda2bfb3b9f0282f2c3
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51322
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Evgeny Zinoviev <me@ch1p.io>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-03-14 16:35:37 +00:00
Dmitry Torokhov 39c1b4f951 Documentation/acpi: switch example from edge to level interrupts
Configuring touch controllers to use edge-triggered interrupts is not
recommended as it is very easy to lose an edge when kernel drivers
disable the interrupt for one reason or another, and recovering from
this condition requires workarounds in the kernel.

Unfortunately the example setting up a touchpad used edge-triggered
interrupts, and this set up has been propagating through the boards.
Let's switch the example to use level interrupts instead.

Change-Id: I4dc8b91ed070ce117553b00a087ad709aeaf16af
Signed-off-by: Dmitry Torokhov <dtor@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51398
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2021-03-11 22:38:52 +00:00
Nico Huber c4aa24fc12 doc/mb/lenovo/montevina: Clarify use of bincfg
`bincfg` is not creating anything new, it just converts
from text to binary.

Change-Id: I14e67ee8bc449d171a951f6edeaa9f9d0c04dbe1
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51319
Reviewed-by: Evgeny Zinoviev <me@ch1p.io>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-03-07 13:59:23 +00:00
xuxinxiong 9a446bdf07 mb/google/trogdor: Add new configs homestar
New boards introduced to trogodor family.

BUG=b:180668002
BRANCH=none
TEST=make

Signed-off-by: xuxinxiong <xuxinxiong@huaqin.corp-partner.google.com>
Change-Id: If0f9b6c89198a882acae7191d08b166eb8c1dd71
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51004
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2021-02-26 01:37:40 +00:00
Johnny Lin aed1952f05 doc/mb/ocp: Update DeltaLake for VPD variables used in LinuxBoot
u-root commits:
bmc_bootorder_override
https://github.com/u-root/u-root/pull/1902
systemboot_log_level:
https://github.com/u-root/u-root/pull/1922

Change-Id: I3da7291188ee06c50008aa3fc7142210215044d4
Signed-off-by: Johnny Lin <johnny_lin@wiwynn.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50377
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
2021-02-24 11:27:43 +00:00
Angel Pons 83e6c15b0e Doc/releases/checklist.md: Clarify tag push command
Change-Id: I0a6d1ed014c6454c4bde390283351c19fe097201
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47813
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-02-23 17:25:59 +00:00
Alexey Vazhnov 63b87e985c Document Gigabyte GA-G41M-ES2L
To replace wiki page https://www.coreboot.org/Board:gigabyte/ga-g41m-es2l

+ configs/config.gigabyte_ga-g41m-es2l
+ lshw output examples
+ memory modules compatibility

Tested in Devuan 4 Chimaera.
Tested from exact steps from this documentation.

Change-Id: Ib45cfea15b43d7399e9d209f7ba7c6b24fe860dd
Signed-off-by: Alexey Vazhnov <vazhnov@boot-keys.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50368
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Evgeny Zinoviev <me@ch1p.io>
2021-02-22 07:21:30 +00:00
Alexey Vazhnov f595984043 Documentation: move `coding_style.md` inside contributing/
Keep less files in the root directory.

Change-Id: I9eebd0b0826181340ead41af5284362d1cca09d7
Signed-off-by: Alexey Vazhnov <vazhnov@boot-keys.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50852
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2021-02-22 07:20:59 +00:00
Martin Roth 5c7341331d treewide: Remove trailing whitespace
Remove trailing whitespace in files that aren't typically checked.

Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: I8dfffbdeaadfa694fef0404719643803df601065
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50704
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-02-17 17:30:05 +00:00
Paul Menzel c4062c78a9 device: Add unit to Kconfig option name: `PRE_GRAPHICS_DELAY_MS`
It’s good practice to put the unit into the name.

Change-Id: I1493f61d4e495c22f09abf1829bb2eab9b1fd2b6
Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50517
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2021-02-15 17:05:18 +00:00
Evgeny Zinoviev b08543a640 Doc/mb/lenovo/montevina_series: Use Makefile to generate IFD
util/bincfg's Makefile already has target that generates flash
descriptor. Use it instead.

Change-Id: I1756514e1ab7b64de23a98314d8a32e9258e648c
Signed-off-by: Evgeny Zinoviev <me@ch1p.io>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39762
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-02-09 07:48:13 +00:00
Evgeny Zinoviev d2b3961fdc Documentation: Use correct KiB/MiB units instead of KB/MB
Fix a common mistake of using KB/MB where KiB/MiB is what actually is meant.

1 MB = (10^3)^2 = 1000000
1 MiB = (2^10)^2 = 1048576

Change-Id: I78327652b6c6526318071a9d4bafd7ec279ea614
Signed-off-by: Evgeny Zinoviev <me@ch1p.io>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39685
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-02-09 07:47:41 +00:00
Julius Werner ca935d1107 Documentation: Codify some guidelines for headers and chain-including
There has been some repeated discussion about how header includes should
be formatted, specifically on the topic of chain-including. The coding
style currently doesn't say anything about the topic but clearly people
have some basic assumptions. This patch tries to codify some common
ground rules that are supposed to reflect the existing practice.

Signed-off-by: Julius Werner <jwerner@chromium.org>
Change-Id: Ibbcde306a814f52b3a41b58c7a33bdd99b0187e0
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50247
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-02-06 09:08:04 +00:00
Martin Roth 064b250fac Update util.md documentation
This is the new output of the util_readme.sh script.

Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: Ia46924474f75692192ef4b52aab714f5071f9534
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48966
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-01-28 20:17:11 +00:00
Tim Crawford fdc8fd3602 mb/system76/oryp5: Add System76 Oryx Pro 5
Tested with TianoCore payload (UefiPayloadPkg).

Working:

- PS/2 keyboard, touchpad
- Both DIMM slots
- Both NVMe ports
- SATA port
- All USB ports
- Webcam
- Ethernet
- Integrated graphics
- Internal microphone
- S3 suspend/resume
- Flashing with flashrom
- Booting to Ubuntu Linux and Windows

Not working:

- Discrete/Hybrid graphics
- Internal speakers

These two require new drivers to work correctly, which will be added and
enabled later.

Change-Id: Iae6e530dcd52df3642cdfe74b65bfff5aa0dd402
Signed-off-by: Tim Crawford <tcrawford@system76.com>
Signed-off-by: Jeremy Soller <jeremy@system76.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47892
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-01-28 09:15:00 +00:00
Martin Roth 2cee2ff256 Documentation: Add documentation on jenkins builders
Put this in a new directory called 'infrastructure' and make a link
and an index.md file for the directory.

Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: I54a0204e7525a25f2fd717a73007b304aac67396
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43984
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-01-25 08:56:27 +00:00
Angel Pons 0ec903a73b Doc/mb/lenovo/Sandy_Bridge_series.md: Clarify installation
Unlike Ivy Bridge series, there isn't a method to flash coreboot
internally when running vendor firmware (yet). Until someone finds a way
to bypass flash protections, the first flash has to be done externally.

Change-Id: Idaff264f2b7277516d69d1323f1a0c885b28c3db
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49848
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2021-01-24 23:21:23 +00:00
Angel Pons 76943a3443 Doc/mb/lenovo: Correct typo
Change-Id: If31c59f21c5533d8b5b015c9e60edd6e4e7072e4
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49847
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-01-24 23:21:17 +00:00
Michael Niewöhner d509ee55b6 soc/intel/apl: drop LPC pad configuration code
Drop LPC pad configuration code since all boards now do pad
configuration on their own. The comment about LPC_CLKRUNB when using
eSPI is moved to `Documentation/getting_started/gpio.md`.

Change-Id: I710d6aee8c3b2c8282cd321cd0688b9b26abea07
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49410
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-01-23 09:23:23 +00:00
Patrick Rudolph 6279cabb5b Documentation: Fix toctree and remove dead links
Change-Id: Ie3c7c33096f60a5aa476ff55c538fe68ffadc068
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49292
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-01-12 13:36:36 +00:00
Patrick Rudolph fc1d50a365 Documentation: Add known bugs of x86_64 code on real hardware
The bugs happen on real hardware or in qemu with KVM enabled.
The very same code runs on some real devices and it runs in qemu
with KVM disabled.

The bugs are so strange that no root cause could be found yet.

Change-Id: I01050f2e38f92c6b96e3258a5b619aa9ee685acc
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44733
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2021-01-12 13:36:30 +00:00
Sam Lewis 1c18f8679f Documentation: Add Beaglebone Black documentation
Change-Id: If1a9808d1f20ee61048182d416f25e9a81c631af
Signed-off-by: Sam Lewis <sam.vr.lewis@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44389
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2020-12-24 08:30:28 +00:00
Angel Pons 9223b71a4c Doc/mb/lenovo: Explain simpler GM45 flash method first
Do not mislead newcomers into thinking the GM45 series laptops are hard
to flash. Describe the simple coreboot flashing procedure first, then
explain how to remove the ME firmware and use a custom flash layout.

Also, reword a sentence on the simple flashing procedure for clarity.

Change-Id: Ie83ec3d20f00e9d9c869e483e24d601506857f07
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48604
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Swift Geek (Sebastian Grzywna) <swiftgeek@gmail.com>
Reviewed-by: Evgeny Zinoviev <me@ch1p.io>
2020-12-14 08:17:33 +00:00
Angel Pons d0fd7b0693 Doc/mainboard: Sort Lenovo laptop generation groups
GM45 is older than Arrandale, so swap their order.

Change-Id: I5b94d940c0378dd561535257d3352700fd482527
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48603
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Evgeny Zinoviev <me@ch1p.io>
2020-12-14 08:17:27 +00:00
Furquan Shaikh 339269d587 Docs/cbfstool: Add details about memory mapped window handling
This change adds details memory mapped window handling in cbfstool
required for x86 platforms. It also captures the details about the
newly added support for multiple decode windows.

BUG=b:171534504

Change-Id: Icf970f951e56d717e6a4f8845fc73f10d5a21dd0
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48477
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
2020-12-11 01:11:16 +00:00
Jonathan Zhang 36854a831e Documentation/mainboard/ocp: Update DeltaLake
DeltaLake Open System Firmware stack (FSP/coreboot/Linuxboot) has
reached EVT exit parity. Update the documentation accordingly.

Signed-off-by: Jonathan Zhang <jonzhang@fb.com>
Change-Id: I7cce855d207a53b1d3cd497b74cdc0b00027a3ce
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48252
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Christian Walter <christian.walter@9elements.com>
2020-12-05 09:47:00 +00:00
Michael Niewöhner 43dd2e458f docs/mb/supermicro/x11-lga-series: Update documentation
- Drop issue about non-working TianoCore with Aspeed NGI. see CB:35726
- Add missing reference to X11SSH-F
- Drop TODO reference; there are no TODOs left

Change-Id: I5becfa9ea01a0d9d651c6b51b30ebfcedb6412a5
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48101
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by:  Felix Singer <felixsinger@posteo.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-11-27 20:49:16 +00:00
Michael Niewöhner 4c56d79ba6 {docs/,}mb/supermicro/x11ssh-tf: drop TODO section
Drop the TODO comment, since there is no TODO left. Also drop the now
obsolete TODO section from the board documentation.

Change-Id: I4192aaedc1429c8ff1bd7c52baa4741e1df0d0c5
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48126
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by:  Felix Singer <felixsinger@posteo.net>
2020-11-27 20:49:04 +00:00
Michael Niewöhner ce04a42db9 docs/mb/supermicro/x11ssm-f: Update board documentation
- Drop vanished issue on PCIe warning
- Drop TODO section, since the TODOs are done
- Document the jumper J6, that was not documented by the vendor. Its
  function has been determined by dissecting a dead board.
- The flash is not socketed anymore. Drop that note and compress the
  whole paragraph. Also add a note about flashing via the BMC web
  interface.

Change-Id: I2b5a08a6b6d80717621d6a30f31829fe4b84891a
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48125
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by:  Felix Singer <felixsinger@posteo.net>
2020-11-27 20:48:55 +00:00
Paul Menzel 9226fe9aee Documentation: Mention newer Intel μ-code updates in 4.13 release notes
Start a new section *Notes* for these kind of information.

Change-Id: I86be22cebb96e6f07676a9bc52794a4c12dad3e4
Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47762
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-11-22 22:21:29 +00:00
Angel Pons c930c87998 Doc/releases/checklist.md: Fix up URLs
Use angle brackets so that they appear as links, and update a link to a
Gerrit change to use the current format.

Change-Id: I41f82986429dcfd1cbc5b5c088a0c47bd24a57c4
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47812
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-11-22 22:19:58 +00:00
Angel Pons 5ea7bb74bd Doc/releases/checklist.md: Add reminder to unpack relnotes
Explicitly add this easy-to-forget step. Also add a missing period.

Change-Id: Iaf13155fcc8a70f3565fb2404cef886524fa5161
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47811
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-11-22 22:19:48 +00:00
Maxim Polyakov 0fcd37172f mb/kontron: Add Kontron mAL10 COMe module support
This patch adds support for the Kontron mAL10 COMe module with the
Apollo Lake SoC together with Kontron T10-TNI carrierboard.

Working:
  - UART console and I2C on Kontron kempld;
  - USB2/3
  - Ethernet controller
  - eMMC
  - SATA
  - PCIe ports
  - IGD/DP
  - SMBus
  - HWM

Not tested:
  - IGD/LVDS
  - SDIO

TODO:
  - HDA (codec IDT 92HD73C1X5, currently disabled)

Tested payloads:
  - SeaBIOS
  - Tianocore, UEFIPayload - without video, EFI-shell in console only

Tested on COMe module with Intel Atom x5-E3940 processor (4 Core,
1.6/1.8GHz, 9.5W TDP). Xubuntu 18.04.2 was used as a bootable OS
(5.0.0-32-generic linux kernel)

Change-Id: Ib8432e10396f77eb05a71af1ccaaa4437a2e43ea
Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39133
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-11-22 22:18:22 +00:00