Commit Graph

16 Commits

Author SHA1 Message Date
Frank Wu 3a4e201a21 spd/lp5: Update memory configuration of H9JCNNNFA5MLYR-N6E
Update bitWidthPerChannel in memory_parts.json and re-generate the SPD.
Then the device boots successfully with DDR H9JCNNNFA5MLYR-N6E.

BUG=b:261530632
BRANCH=None
TEST=util/spd_tools/bin/spd_gen spd/lp5/memory_parts.json lp5

Change-Id: Ib78c2e28394206b59c41b6b28cf24d8a756f7ae9
Signed-off-by: Frank Wu <frank_wu@compal.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/70741
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Reviewed-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com>
Reviewed-by: Ian Feng <ian_feng@compal.corp-partner.google.com>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
2022-12-15 14:28:02 +00:00
Frank Wu afd2f6ed62 spd/lp5: Add new memory configuration of H9JCNNNFA5MLYR-N6E
Add Hynix H9JCNNNFA5MLYR-N6E in the memory_parts.json and re-generate
the SPD.

BUG=b:250470704
BRANCH=None
TEST=util/spd_tools/bin/spd_gen spd/lp5/memory_parts.json lp5

Signed-off-by: Frank Wu <frank_wu@compal.corp-partner.google.com>
Change-Id: I9926a5859cf060e0bfa903f47d8a98c8d6115579
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68154
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jon Murphy <jpmurphy@google.com>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Reviewed-by: Chao Gui <chaogui@google.com>
2022-10-20 16:24:06 +00:00
EricKY Cheng a261502de5 spd/lp5: Add new memory configuration of H58G66BK7BX067 and H58G56BK7BX068
Add Hynix H58G66BK7BX067 and H58G56BK7BX068 in the
memory_parts.json and re-generate the SPD.

BUG=b:243337816
BRANCH=None
TEST=util/spd_tools/bin/spd_gen spd/lp5/memory_parts.json lp5

Signed-off-by: EricKY Cheng <ericky_cheng@compal.corp-partner.google.com>
Change-Id: I8d6aac3ecec36b126e7e41d6c9475695aa7a26b2
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68212
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jon Murphy <jpmurphy@google.com>
2022-10-13 17:06:20 +00:00
Caveh Jalali c762e231da util/spd_tools: Update LP5X support for ADL/RPL/MTL
This updates the SPD utility and generated SPDs for LP5X to use memory
type code 0x15 (LPDDR5X) instead of 0x13 (LPDDR5). This is done based on
Intel Tech Advisory Doc ID #616599 dated May 2022, page 15.

SPDs were regenerated with:
  "util/spd_tools/bin/spd_gen spd/lp5/memory_parts.json lp5"

This only affects the SPDs for 2 memory parts for Intel SoCs and the
only board referencing these is rex.

BUG=b:242765117
TEST=inspected SPD hex dump

Change-Id: Iadb4688f1cb4265dab1dc7c242f0c301d5498b83
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67265
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Reka Norman <rekanorman@chromium.org>
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
2022-09-07 22:19:21 +00:00
EricKY Cheng df23c33a54 mb/google/skyrim/var/winterhold: Update Lp5x and Lp5 memory support
Update K3KL8L80CM-MGCT, K3KL9L90CM-MGCT,H58G66AK6BX070 support

BRANCH=None
BUG=b:243337816
TEST= SPD add

Signed-off-by: EricKY Cheng <ericky_cheng@compal.corp-partner.google.com>
Change-Id: I2c370fbd007c22b1f94074d9f16e5bc7c4e04848
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67104
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Jon Murphy <jpmurphy@google.com>
Reviewed-by: Amanda Hwang <amanda_hwang@compal.corp-partner.google.com>
2022-08-30 14:52:37 +00:00
Tarun Tuli 59b9d96d62 spd/lp5: Add SPD for Micron MT62F2G32D4DS-026
This adds support for Micron MT62F2G32D4DS-026 chips.

BUG=b:240289148
TEST=util/spd_tools/bin/spd_gen spd/lp5/memory_parts.json lp5

Signed-off-by: Tarun Tuli <taruntuli@google.com>
Change-Id: I1212506d742178803a7e7bf7e0236d1095f7af9d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66163
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
2022-07-29 15:00:33 +00:00
Jack Rosenthal e9b2d0478f spd/lp5: Add support for MT62F1G32D2DS-026 WT:B
Datasheet is available in the bug.

BUG=b:238674174
BRANCH=firmware-brya-14505.B
TEST=util/spd_tools/bin/spd_gen spd/lp5/memory_parts.json lp5

Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Change-Id: Iadd4bf07d38dbd2e1f47df5024282b04dec3c805
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65795
Reviewed-by: Caveh Jalali <caveh@chromium.org>
Reviewed-by: Reka Norman <rekanorman@chromium.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-07-14 21:27:33 +00:00
Leo Chou 78b39dd999 spd/lp5: Add SPD for Samsung K3LKCKC0BM-MGCP
This adds support for Samsung K3LKCKC0BM-MGCP LP5 chips.

Generatd SPD data with:
util/spd_tools/bin/spd_gen spd/lp5/memory_parts.json lp5

BRANCH=None
BUG=235664831

Signed-off-by: Leo Chou <leo.chou@lcfc.corp-partner.google.com>
Change-Id: I49cea0594f8a94aa7efbb375ea1c28b5d1136498
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65085
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Reka Norman <rekanorman@chromium.org>
2022-06-17 14:32:56 +00:00
Caveh Jalali afc80bcdd5 spd/lp5: Add SPD for Micron MT62F1G32D4DS
This adds support for Micron "MT62F1G32D4DS-031 WT:B" LP5 chips.

generatd SPD data with:
 util/spd_tools/bin/spd_gen spd/lp5/memory_parts.json lp5

BRANCH=none
BUG=b:233822309

Change-Id: Idd7fb074c4747a705a1870cd3d4393867289923b
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64733
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
2022-06-03 19:46:09 +00:00
Terry Chen 5f9e2ded9f spd/lp5: Add new LP5 part H58G56AK6BX069
Hynix H58G56AK6BX069 will be used by the brya variant crota. Add
it to the LP5 parts list and regenerate the SPDs using spd_gen.

BUG=b:233830713
TEST=util/spd_tools/bin/spd_gen spd/lp5/memory_parts.json lp5

Signed-off-by: Terry Chen <terry_chen@wistron.corp-partner.google.com>
Change-Id: I6136e17706c6248598886f8f9bd8fdd7efff4dab
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64662
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Reka Norman <rekanorman@chromium.org>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
2022-06-02 20:30:48 +00:00
Tyler Wang df03dec7f5 spd: Add new LP5 part Samsung K3LKLKL0EM-MGCN
Samsung K3LKLKL0EM-MGCN will be used by the nissa variant craask. Add
it to the LP5 parts list and regenerate the SPDs using spd_gen.

BUG=b:229938024
TEST=util/spd_tools/bin/spd_gen spd/lp5/memory_parts.json lp5

Signed-off-by: Tyler Wang <tyler.wang@quanta.corp-partner.google.com>
Change-Id: I5648f297130eaf8541d99b2db7777774a0b1d8fc
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64439
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kangheui Won <khwon@chromium.org>
Reviewed-by: Reka Norman <rekanorman@chromium.org>
2022-05-31 13:45:09 +00:00
Amanda Huang 31b20a1277 spd/lp5: Add new part MT62F2G32D8DR-031
Micron MT62F2G32D8DR-031 will be used for skyrim P1. Add it to the parts
list and regenerate the SPDs using spd_gen.

BUG=b:213926260
TEST=util/spd_tools/bin/spd_gen spd/lp5/memory_parts.json lp5

Change-Id: Iad2bb53de2b54648d5dd66808973f26b1c8a5df7
Signed-off-by: Amanda Huang <amanda_hwang@compal.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62542
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-03-10 15:16:52 +00:00
Reka Norman 343b36bbc3 spd/lp5: Add new part H9JCNNNBK3MLYR-N6E
Hynix H9JCNNNBK3MLYR-N6E will be used for nereid P1. Add it to the parts
list and regenerate the SPDs using spd_gen.

BUG=b:217096008
TEST=None

Signed-off-by: Reka Norman <rekanorman@google.com>
Change-Id: I8775fe0551e0712507d42a778e04745a07270d71
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61904
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kangheui Won <khwon@chromium.org>
2022-02-15 16:20:50 +00:00
Reka Norman 687793d3c0 spd: Add new LP5 part Samsung K3LKBKB0BM-MGCP
Samsung K3LKBKB0BM-MGCP will be used by the nissa variant nereid. Add
it to the LP5 parts list and regenerate the SPDs using spd_gen.

BUG=b:197479026
TEST=None

Signed-off-by: Reka Norman <rekanorman@google.com>
Change-Id: I4db983d5015a4dacad0bd03cf7a85f6214856a76
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61442
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kangheui Won <khwon@chromium.org>
2022-02-03 14:47:49 +00:00
Reka Norman cb902fd6bb spd: Add new LP5 parts and generate SPDs
Add the parts below which will be used by the brya variant Vell. Add
the parts to memory_parts.json and generate the SPDs using spd_gen.

Micron MT62F512M32D2DR-031 WT:B
Micron MT62F1G32D4DR-031 WT:B
Hynix  H9JCNNNCP3MLYR-N6E

Generated using:
util/spd_tools/bin/spd_gen spd/lp5/memory_parts.json lp5

BUG=b:204284866
TEST=None

Change-Id: Ifbcadfb78281b2b78a61a9b61180c421748193a0
Signed-off-by: Reka Norman <rekanorman@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58929
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2021-11-08 14:48:49 +00:00
Reka Norman 3aa61136cc spd: Add lp5 directory with empty memory_parts file
Add spd/lp5/memory_parts.json with an empty parts list, then run spd_gen
to generate the manifests and empty SPD.

Generated using:
util/spd_tools/bin/spd_gen spd/lp5/memory_parts.json lp5

BUG=b:204284866
TEST=None

Change-Id: I0314314130a1ccc58fb5a0416b110e7a86338fd0
Signed-off-by: Reka Norman <rekanorman@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58928
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2021-11-05 12:58:32 +00:00