At least when CONFIG_CHROMEOS is turned on, it's possible for
CONFIG_FRAMEBUFFER_KEEP_VESA_MODE to be set but for there not to be any valid
information to put into the framebuffer coreboot table. That means that what's
put in there is junk, probably all zeroes from the uninitialized global
variable the mode information is stored in (mode_info).
When a payload uses libpayload and turns on the coreboot framebuffer console,
that console will attempt to scroll at some point and decrease the cursor's y
coordinate until it is less than the number of rows claimed by the console.
The number of rows is computed by taking the vertical resolution of the
framebuffer and dividing it by the height of the font. Because the mode
information was all zeroes, the coreboot table info is all zeroes, and that
means that the number of rows the console claims is zero. You can't get the
unsigned y coordinate of the cursor to be less than zero, so libpayload gets
stuck in an infinite loop.
The solution this change implements is to add a new function,
vbe_mode_info_valid, which simply returns whether or not mode_info has anything
in it. If not, the framebuffer coreboot table is not created, and libpayload
doesn't get stuck.
Change-Id: I08f3ec628e4453f0cfe9e15c4d8dfd40327f91c9
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: http://review.coreboot.org/1758
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
When bringing up VGA by running the option rom it's sometimes
useful to get more information about the mode that gets set,
or the reason why the mode could not be set or a picture could
not be displayed. Also prefix the output from VBE mode setting
with VBE:
Copying VGA ROM Image from fff0fd78 to 0xc0000, 0x10000 bytes
Real mode stub @00000600: 867 bytes
Calling Option ROM...
int15_handler: INT15 function 5fac!
... Option ROM returned.
VBE: Getting information about VESA mode 4161
VBE: resolution: 1280x1024@16
VBE: framebuffer: d0000000
VBE: Setting VESA mode 4161
VGA Option ROM has been loaded
Change-Id: I2be11f095dc62ed3c99e0d4272ad9d6521608a44
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/1714
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Since we do not run option roms in normal mode nothing was
initializing the BDA/EBDA and yet Linux depends very much
on it having sane values here. For the most part the kernel
tries to work around this not being initialized, but every
once in awhile (1/300 boots or so) it would end up reading
something that looked sane from BDA but was not and then
it would panic.
In this change the EBDA is unconditionally setup before devices
are initialized. I'm not set on the location in dev_initialize()
but there does not seem to be another place to hook it in so
that it runs just once for ALL platforms regardless of whether
they use option roms or not. (possibly hardwaremain?)
The EBDA setup code has been moved into its own location in
arch/x86/lib/ebda.c so it can be compiled in even if the option
rom code is not.
The low memory size is still set to 1MB which is enough to make
linux happy without having to hook into each mainboard to get a
more appropriate value. The setup_ebda() function takes inputs
so it could be changed for a mainboard if needed.
OLD/BROKEN would read garbage. Examples from different boots:
ebda_addr=0x75e80 lowmem=0x1553400
ebda_addr=0x5e080 lowmem=0x3e51400
ebda_addr=0x7aa80 lowmem=0x2f8a800
NEW/FIXED now reads consistent values:
ebda_addr=0xf6000 lowmem=0x100000
Change-Id: I6cb79f0e3e43cc65f7e5fe98b6cad1a557ccd949
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Reviewed-on: http://review.coreboot.org/769
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
- Intel option roms want an initialized i8259 or they will
throw an exception 6. This should be done in the southbridge
code, but that is executed much later than the VGA init, so
initialize the i8259 in src/devices/oprom/x86.c.
In the long run this will allow getting rid of some of the
ugly hacks in some AMD boards' romstage.c
- Don't overwrite the mode when copying mode info information back
from 0x600.
Change-Id: Idb01f13dbcd736d8d830b222ffe1ea85799fcd9c
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/257
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marcj303@gmail.com>
- adds possibility to set a vesa mode without showing a bootsplash
- make bootsplash / mode setting code available in real mode.
Change-Id: I0045c9d75757657f4ce531889593102ea1e39ce5
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/256
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marcj303@gmail.com>
- move int15 handler out of the generic code into the mainboard directories
of those mainboards that actually use it.
- move vbe headers to vbe.h
- move function prototypes used in native oprom code to x86.h
Change-Id: Idfff5e804ea328f7b5feebac72497c97329320ee
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/255
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marcj303@gmail.com>
This redirects that output to the console and implements a basic
keyboard stub.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5793 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
some register values from C.
This theoretically fixes non-vga option roms, but it also allows to use
the same assembler code for option roms and vsm.
It will also make using the bootsplash without yabel a lot easier.
Factor out and improve BDA setup, do some rom segment setup for those
option roms that need it.
Don't call the coreboot exception handler if an exception occurs in real
mode. It's only partly usable, but mainly the Kontron 986LCD-M (and other
i945GM boards) choke on an exception #6 (invalid opcode). This particular
issue is not introduced by the changes in this patch but has been around
for quite a while at least.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5543 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
while others dislike them being extra commits, let's clean them up once and
for all for the existing code. If it's ugly, let it only be ugly once :-)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5507 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
of devices/oprom/x86.c.
We have some tests on hardware. Moving RAMBASE to
1MB needs to wait a bit until C7 cache_as_ram.inc
has been adapted to cache that area or things will
become incredibly slow (1.5s boot time instead of 0.5)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5488 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Allows to drop quite a bunch of nasty code
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5478 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
between having VSA functionality in the code, and adding a VSA image to the
ROM.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5473 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* integrate vsm init into normal x86.c code (so it can run above 1M)
* call void main(unsigned long bist) except void cache_as_ram_main(void)
on Geode LX (as we do on almost all other platforms now)
* Unify Geode LX MSR setup (will bring most non-working LX targets back
to life)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5471 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
util/x86emu is the only part of coreboot that is linked into coreboot
itself that lives in util/.
It's not a utility and it does not really belong where it lives.
---> svn mv util/x86emu src/devices/oprom
plus necessary Makefile changes to get it building again
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5228 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
