Commit Graph

7 Commits

Author SHA1 Message Date
Reka Norman cb902fd6bb spd: Add new LP5 parts and generate SPDs
Add the parts below which will be used by the brya variant Vell. Add
the parts to memory_parts.json and generate the SPDs using spd_gen.

Micron MT62F512M32D2DR-031 WT:B
Micron MT62F1G32D4DR-031 WT:B
Hynix  H9JCNNNCP3MLYR-N6E

Generated using:
util/spd_tools/bin/spd_gen spd/lp5/memory_parts.json lp5

BUG=b:204284866
TEST=None

Change-Id: Ifbcadfb78281b2b78a61a9b61180c421748193a0
Signed-off-by: Reka Norman <rekanorman@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58929
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2021-11-08 14:48:49 +00:00
Reka Norman 3aa61136cc spd: Add lp5 directory with empty memory_parts file
Add spd/lp5/memory_parts.json with an empty parts list, then run spd_gen
to generate the manifests and empty SPD.

Generated using:
util/spd_tools/bin/spd_gen spd/lp5/memory_parts.json lp5

BUG=b:204284866
TEST=None

Change-Id: I0314314130a1ccc58fb5a0416b110e7a86338fd0
Signed-off-by: Reka Norman <rekanorman@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58928
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2021-11-05 12:58:32 +00:00
Reka Norman 10f2faacea spd: Add SPD for 4JQA-0622AD to spd/
Since generating the SPDs under spd/, a new part was added in
https://review.coreboot.org/57550. Regenerate the SPDs to include this
new part.

Commands used:
cp util/spd_tools/ddr4/global_ddr4_mem_parts.json.txt \
    spd/ddr4/memory_parts.json
util/spd_tools/bin/spd_gen spd/ddr4/memory_parts.json ddr4

BUG=b:191776301
TEST=None

Signed-off-by: Reka Norman <rekanorman@google.com>
Change-Id: Ie673d1a386479f690182050ce4fee7d252ec9530
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57817
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2021-09-23 06:24:11 +00:00
Reka Norman 293a3e03dc util/spd_tools: Remove PLK platform
Currently spd_tools treats PCO and PLK as separate platforms. This is
unnecessary since they have the same SPD requirements. Remove PLK, and
use PCO as the platform for all zork variants.

BUG=b:191776301
TEST=None

Signed-off-by: Reka Norman <rekanorman@google.com>
Change-Id: I7eeeab53fb3e0d92c3675fb80b4747297d4257ab
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57771
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
2021-09-23 06:23:46 +00:00
Reka Norman bdc49b2de3 lib/Makefile.inc: Generate placeholder spd.bin in lib/Makefile.inc
When a new variant is created, it needs to have a path to its SPD binary
defined. Currently, this is done by setting SPD_SOURCES to a placeholder
SPD file, which just contains zero bytes.

To remove the need for a placeholder file, automatically generate a
single-byte spd.bin in lib/Makefile.inc when SPD_SOURCES is set to the
marker value 'placeholder'.

BUG=b:191776301
TEST=Change cappy/memory/Makefile to `SPD_SOURCES = placeholder`. Build
and check that spd.bin contains a single zero byte.

Signed-off-by: Reka Norman <rekanorman@google.com>
Change-Id: I11f8f9b7ea3bc32aa5c7a617558572a5c1c74c72
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57795
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
2021-09-23 06:20:59 +00:00
Reka Norman cf0014b145 spd: Add a placeholder SPD file to spd/
When a new variant is created, its SPD_SOURCES contains a placeholder
file, to avoid a build failure due to SPD_SOURCES being empty. Currently
these placeholder files live with the rest of the SPD files in soc and
mainboard directories, e.g.
src/soc/intel/alderlake/spd/placeholder.spd.hex

Add a similar placeholder SPD file to the new spd/ directory.

BUG=b:191776301
TEST=None

Signed-off-by: Reka Norman <rekanorman@google.com>
Change-Id: Ia6d76ed512a7e44221fc93ad960790be575c44c2
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57732
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
2021-09-20 23:50:49 +00:00
Reka Norman c65fba87b3 spd: Generate SPDs under spd/ using unified spd_gen tool
Use the new unified version of the spd_gen tool to generate all LP4x and
DDR4 SPDs, storing them in a new spd/ directory. Storing them in a
common location allows platforms with the same SPD requirements to share
SPD files, reducing duplication compared to storing SPDs in soc/ and
mainboard/ directories.

For each memory technology there are multiple sets of SPDs. Each set
corresponds to a set of platforms with different SPD requirements, e.g.
due to different memory training code expectations. A manifest file
(platforms_manifest.generated.txt) lists the platform -> set mappings.

Commands used to generate SPDs:
cp util/spd_tools/lp4x/global_lp4x_mem_parts.json.txt \
    spd/lp4x/memory_parts.json
cp util/spd_tools/ddr4/global_ddr4_mem_parts.json.txt \
    spd/ddr4/memory_parts.json
util/spd_tools/bin/spd_gen spd/lp4x/memory_parts.json lp4x
util/spd_tools/bin/spd_gen spd/ddr4/memory_parts.json ddr4

BUG=b:191776301
TEST=None

Signed-off-by: Reka Norman <rekanorman@google.com>
Change-Id: Iac82847a1a0c1f2e7271d0d3b3a7261849813a24
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57514
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
2021-09-20 23:20:50 +00:00