Commit Graph

1810 Commits

Author SHA1 Message Date
Michał Żygowski ba08c4904d payloads/tianocore: Allow custom build parameters
Currently, custom TianoCore builds are allowed, but those may need
different parameters. Add a Kconfig option to specify additional
parameters to be appended to build command.

Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Signed-off-by: Michał Kopeć <michal.kopec@3mdeb.com>
Change-Id: I025459ae94592103b4be0c68b422100b7c649d34
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62497
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
2022-06-09 16:58:39 +00:00
Hsuan Ting Chen 607b39c593 libpayload: Add commonlib/bsd/elog and its dependency
Add commonlib/bsd/elog dependency in libpayload. This will allow other
payloads (e.g. depthcharge) to implement their own eventlog read and
write utilities.

Also include commonlib/bsd/elog.c source to libc-srcs. This ensure
payloads could utilize commonlib elog helper functions.

Change-Id: I64d0fdd2a8eff1d89a1ac451d37b61787b5564e7
Signed-off-by: Hsuan Ting Chen <roccochen@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63115
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2022-06-09 13:33:35 +00:00
Bill XIE bb1e37e76b payloads/external: Reword help of SEAGRUB_ALLOW_SEABIOS_BOOTMENU
The sentence about "to bypass the secure mechanism implemented in
the GRUB runtime config" sounded confusing, so reword it.

Signed-off-by: Bill XIE <persmule@hardenedlinux.org>
Change-Id: I9c6f40d6d11d459fe4be40a624921c2632a89564
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64970
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
2022-06-07 12:56:18 +00:00
Julius Werner 23d2465720 commonlib: Clean up compiler.h
This patch contains several minor cleanups related to compiler.h:

- Replace __always_unused() (which is a Linux-specific concept that
  doesn't make sense without also having __maybe_unused(), and had zero
  uses in the codebase) with __unused() which moves here from helpers.h

- Add __underscores__ to the names of all attributes in the compiler
  attribute shorthand macros. This is necessary to make them work in
  files where the same name was already used for an identifier (e.g.
  cbfstool/cbfs.h's `unused` array of file types).

- Remove libpayload's own copy of compiler.h and make it directly pull
  in the commonlib/bsd copy.

Signed-off-by: Julius Werner <jwerner@chromium.org>
Change-Id: I9644da594bb69133843c6b7f12ce50b2e45fd24b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64737
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
2022-06-07 12:34:35 +00:00
Nicholas Chin 8d885577ce payloads/external: Add support for coreDOOM payload
coreDOOM is a port of DOOM to libpayload, based on the doomgeneric
source port. It renders the game to the coreboot linear framebuffer,
and loads WAD files from CBFS.

Tested with QEMU i440fx/q35 and a Dell Latitude E6400 using the
libgfxinit provided linear framebuffer.

Project page: https://github.com/nic3-14159/coreDOOM

Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
Change-Id: Ice0403b003a4b2717afee585f28303c2f5abea5d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57222
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Martin L Roth <gaumless@tutanota.com>
2022-05-28 15:01:47 +00:00
Nicholas Chin c217f31d0b payloads/tianocore: Fix unclean working directory detection
After commit ae48b42683 (payloads/tianocore: Init submodules),
Tianocore's Makefile no longer detects an unclean working directory and
thus always performs a `git checkout`, overwriting any uncommited
changes made in the cloned sources.

The change of "clean" to "dirty" effectively inverts the logic of the
if-else condition, which would normally swap the two possible code paths
of the branch. However, since `git status` outputs multiple lines, most
of which do not contain "clean", the -v option (select non-matching
lines) causes grep to always match at least 1 line and thus return
success.  This causes the if-else branch containing the `git checkout`
to always be taken regardless of the state of the working tree, masking
the issue of the inverted logic.  Removing the -v option addresses both
of these issues and restores the intended behavior of the if-else block.

TEST:
1) Build coreboot successfully with the Tianocore UefiPayloadPkg option.
2) Make a change in the cloned Tianocore sources that results in an
   unclean working directory and check for the "Working directory not
clean" message when building coreboot.

Change-Id: Icd4952b40c147d0fba676089ced5a8b59b93ad50
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64608
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@tutanota.com>
2022-05-28 14:57:07 +00:00
Bill XIE 3dda4dad1d payloads/external: Add more option related to SeaBIOS and GRUB2
Also known as "SeaGRUB", running GRUB2 atop SeaBIOS proves to be a
useful configuration, since SeaBIOS has improved its hardware
compatibility. For example, some USB drive can work under SeaBIOS but
do not work under native GRUB2, and GRUB2 can use BIOS call (provided
by SeaBIOS) as a fallback method to access hardware if it is present.

But more option is added addition to "SeaGRUB": now GRUB2 and SeaBIOS
can be built as secondary payloads, and "SeaGRUB" is now implemented
as "Primary SeaBIOS + Secondary GRUB2 (selected) + config files".

Signed-off-by: Bill XIE <persmule@hardenedlinux.org>
Change-Id: Ie681fa231abfe4a8f1e4510b3c17957550a9d2f8
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60640
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@tutanota.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
2022-05-24 12:58:52 +00:00
Jianjun Wang 20a87c0bed libpayload/pci: Add pci_map_bus function for MediaTek platform
Add 'pci_map_bus' function and PCIE_MEDIATEK config for MediaTek
platform.

TEST=Build pass and boot up to kernel successfully via SSD on Dojo
board, here is the SSD information in boot log:
 == NVME IDENTIFY CONTROLLER DATA ==
    PCI VID   : 0x15b7
    PCI SSVID : 0x15b7
    SN        : 21517J440114
    MN        : WDC PC SN530 SDBPTPZ-256G-1006
    RAB       : 0x4
    AERL      : 0x7
    SQES      : 0x66
    CQES      : 0x44
    NN        : 0x1
Identified NVMe model WDC PC SN530 SDBPTPZ-256G-1006

BUG=b:178565024
BRANCH=cherry

Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com>
Change-Id: I9ea7d111fed6b816fa2352fe93c268116519a577
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56794
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
2022-05-20 02:53:35 +00:00
Jianjun Wang 2ad74deb2a libpayload/pci: Add support for bus mapping
Move the common APIs to pci_ops.c and IO based operations to
pci_io_ops.c, and add pci_map_bus_ops.c to support bus mapping.

TEST=Build pass and boot up to kernel successfully via SSD on Dojo
board, here is the SSD information in boot log:
 == NVME IDENTIFY CONTROLLER DATA ==
    PCI VID   : 0x15b7
    PCI SSVID : 0x15b7
    SN        : 21517J440114
    MN        : WDC PC SN530 SDBPTPZ-256G-1006
    RAB       : 0x4
    AERL      : 0x7
    SQES      : 0x66
    CQES      : 0x44
    NN        : 0x1
Identified NVMe model WDC PC SN530 SDBPTPZ-256G-1006

BUG=b:178565024
BRANCH=cherry

Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com>
Change-Id: Ie74801bd4f3de51cbb574e86cd9bb09931152554
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56789
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
2022-05-20 02:51:33 +00:00
Jianjun Wang d16c2aa6de coreboot_tables: Add PCIe info to coreboot table
Add 'lb_fill_pcie' function to pass PCIe information from coreboot to
libpayload, and add CB_ERR_NOT_IMPLEMENTED to the cb_err enum for the
__weak function.

ARM platform usually does not have common address for PCIe to access the
configuration space of devices. Therefore, new API is added to pass the
base address of PCIe controller for payloads to access PCIe devices.

TEST=Build pass and boot up to kernel successfully via SSD on Dojo
board, here is the SSD information in boot log:
 == NVME IDENTIFY CONTROLLER DATA ==
    PCI VID   : 0x15b7
    PCI SSVID : 0x15b7
    SN        : 21517J440114
    MN        : WDC PC SN530 SDBPTPZ-256G-1006
    RAB       : 0x4
    AERL      : 0x7
    SQES      : 0x66
    CQES      : 0x44
    NN        : 0x1
Identified NVMe model WDC PC SN530 SDBPTPZ-256G-1006

BUG=b:178565024
BRANCH=cherry

Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com>
Change-Id: I6cdce21efc66aa441ec077e6fc1d5d1c6a9aafb0
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63251
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Reviewed-by: Shelley Chen <shchen@google.com>
2022-05-19 16:34:55 +00:00
David Hendricks 7d0e5fa3ff libpayload: Fix guards in include/{arm,arm64,x86}/arch/barrier.h
Change-Id: Ib4897c4f5837f7f3173d5062eecb893adbe36964
Signed-off-by: David Hendricks <david.hendricks@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64365
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2022-05-16 06:55:06 +00:00
Elyes Haouas 9ca1ef96ae payloads/coreinfo/coreboot_module.c: Remove 'break' after 'return'
Change-Id: Icb60115349ef7c4c35635021784138d45c5a8872
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61954
Reviewed-by: Martin L Roth <gaumless@tutanota.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-05-16 02:56:31 +00:00
Elyes Haouas ae2c045733 payloads/nvramcui/nvramcui.c: Reformat code
Change-Id: If5b4ae7d9f9046e56ca098c0469b503130bc8707
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61955
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@tutanota.com>
2022-05-16 02:49:50 +00:00
Nico Huber 8ddecd8538 libpayload/nvme: Fix controller disablement in (de)init sequence
We wrote to the wrong register. The EN bit is in the CC (Controller
Configuration) register at 0x14.

Fixes re-initialization in QEMU and on siemens/chili during a second
FILO run.

Change-Id: I125de55d7f1a7c9f070437190c5a08a288b274f8
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63935
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Thomas Heijligen <src@posteo.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-05-11 12:19:03 +00:00
Nico Huber 88b041897f libpayload/nvme: Test for NVMe-command-set bit individually
We only need to know if the NVMe command set is supported. Other
command-set bits can be set too, but we don't have to care.

Fixes init in QEMU which has more command-set bits set by now.

Change-Id: I29a693cf8cc13775e94dc671e8d0412ad86fef9c
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63934
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Thomas Heijligen <src@posteo.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-05-11 12:15:11 +00:00
Nico Huber 2b986700c9 libpayload/nvme: Fix error paths of nvme_init()
We mustn't try to release resources that we haven't acquired yet. Also,
sending commands to the NVMe device is futile if we already timed out.

Fixes hangs after a failed init noticed in QEMU and on siemens/chili.

Change-Id: Ib83c7785d6e0dc3c44fbd50a30694c74932750d6
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63933
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Thomas Heijligen <src@posteo.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-05-11 12:14:20 +00:00
Selma Bensaid 4bc425c521 payloads/depthcharge: enable LP_CHROMEOS in depthcharge
Fix standslone build failure after depthcharge patch
https://crrev.com/c/3461454 merge.

BUG=chrome-os-partner:226438207
TEST=Compiled brya and redrix in standalone mode.

Signed-off-by: Selma Bensaid <selma.bensaid@intel.com>
Change-Id: Ib2bb2ce42a314e05ef22ea7b8abc067d6361d511
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63240
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Jakub Czapiga <jacz@semihalf.com>
2022-04-19 13:03:00 +00:00
Jianjun Wang b2537bdad5 coreboot_tables: Replace 'struct lb_uint64' with lb_uint64_t
Replace 'struct lb_uint64' with 'typedef __aligned(4) uint64_t
lb_uint64_t', and remove unpack_lb64/pack_lb64 functions since it's no
longer needed.

Also replace 'struct cbuint64' with 'cb_uint64_t' and remove
'cb_unpack64' in libpayload for compatible with lb_uint64_t.

Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com>
Change-Id: If6b037e4403a8000625f4a5fb8d20311fe76200a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63494
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2022-04-14 22:27:50 +00:00
Arthur Heymans c73440844d payloads/LinuxBoot: Fix u-root branch
It looks like the u-root 'master' branch was renamed to 'main'.

Change-Id: I384ba66289a49bf226b505615bd16bdf85612c1a
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62590
Reviewed-by: Christian Walter <christian.walter@9elements.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-04-13 14:30:37 +00:00
Sean Rhodes f2d162efca payloads/tianocore: Don't declare tools directory twice
EDK_TOOLS_PATH is set on lines 85 and 137. Remove the instance
on 85. edk2 still builds correctly.

Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: I0c837f14693941afec194b140c93d786ea784e53
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63180
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-04-11 13:59:29 +00:00
Jakub Czapiga 9760264a96 commonlib/bsd/helpers: Remove redundancy with libpayload defines
Move STRINGIFY() from coreboot string.h to commonlib/bsd/helpers.h
Remove redundant defines from libpayload.h and libpayloads' standard
headers.

Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Change-Id: I3263b2aa7657759207bf6ffda750d839e741f99c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62921
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2022-03-30 21:21:47 +00:00
Arthur Heymans cddba4528d libpayload: Parse the ACPI RSDP table entry
Change-Id: I583cda63c3f0b58f8d198ed5ecea7c4619c7a897
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62576
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2022-03-30 00:03:28 +00:00
Jakub Czapiga 3068d562ae libpayload/vboot: Fix include paths fixup macro
Include paths fixup macro for vboot was broken and was adding
unnecessary prefix to paths from $(coreboottop). This patch adds correct
filters to fix this behavior.

Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Change-Id: I264e715fa879a4e56b6e5f5423916298e8780a2b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63002
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2022-03-25 19:25:36 +00:00
Michał Żygowski 8a47a14a2f payloads/iPXE: Update stable version from 2019.3 to to 2022.1
Update iPXE stable from commit id ebf2eaf515:
Mar 18 10:24:08 2019 +0000
[intel] Add PCI ID for I219-V and -LM 6 to 9

to commit id 6ba671acd9:
Jan 17 16:17:17 2022 +0000
[efi] Attempt to fetch autoexec script via TFTP

This brings in 424 new commits and fixes the build with coreboot-sdk
2021-09-23_b0d87f753c.

TEST=Build PC Engines apu2 board and boot it over network with the
iPXE

Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Change-Id: Ide12a3a3082f9ea027e180518a80e6c0772b1232
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62289
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2022-03-22 21:02:59 +00:00
Sean Rhodes e8c186cdef payloads/tianocore: Add missing CONFIG_
Add missing CONFIG_ to the Boot Timeout parameter.

Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: I88f4aa0286a77f6c94b5e5ec97a0034ea7594b4f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62920
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-03-21 21:39:43 +00:00
Ravi Kumar Bokka 42fcb2a8f4 libpayload: Parse DDR Information using coreboot tables
BUG=b:182963902,b:177917361
TEST=Validated on qualcomm sc7280 development board

Signed-off-by: Ravi Kumar Bokka <rbokka@codeaurora.org>
Change-Id: Ieca7e9fc0e1a018fcb2e9315aebee088edac858e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59193
Reviewed-by: Shelley Chen <shchen@google.com>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-03-16 01:21:44 +00:00
Felix Singer cf4a3472b9 payloads/seabios: Update stable version to 1.16.0
SeaBIOS 1.16.0 was released on March 2nd. Thus, update the stable
version from 1.14.0 to 1.16.0.

Change-Id: I475a9be47171bfbe3b3c2d4d1d14bb753d8575a8
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62575
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
2022-03-14 18:18:42 +00:00
Sean Rhodes 63c6d814ce payloads/tianocore: Add prompt for Boot Timeout
Add prompt to Boot Timeout so that it can be easily configured
from a config file.

Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: I62b8f0a9b5bc0796506b991199a457d6b34ae494
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62558
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
2022-03-09 14:20:30 +00:00
Julius Werner 69cc557cfb commonlib/bsd: Remove cb_err_t
cb_err_t was meant to be used in place of `enum cb_err` in all
situations, but the choice to use a typedef here seems to be
controversial. We should not be arbitrarily using two different
identifiers for the same thing across the codebase, so since there are
no use cases for serializing enum cb_err at the moment (which would be
the primary reason to typedef a fixed-width integer instead), remove
cb_err_t again for now.

Signed-off-by: Julius Werner <jwerner@chromium.org>
Change-Id: Iaec36210d129db26d51f0a105d3de070c03b686b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62600
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2022-03-09 02:18:21 +00:00
Julius Werner 2c423441c0 libpayload: cbmem_console: Drop loglevel markers from snapshot
coreboot recently introduced non-printable loglevel markers in the CBMEM
console. Payloads were generally unaffected since they don't use log
levels and it is still legal to append lines without a marker to the
log. However, payloads using cbmem_console_snapshot() to display
existing logs from coreboot have started seeing '?' characters in place
of the markers. This patch fixes the issue by filtering out marker
characters.

BUG=b:221909874

Signed-off-by: Julius Werner <jwerner@chromium.org>
Change-Id: I4a9e5d464508320cf43ea572d62896d38c2a128d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62506
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
2022-03-04 16:04:10 +00:00
Jakub Czapiga 49fff57a09 libpayload/bin/lpgcc: Make lpgcc provide TPM configuration for vboot
TPM1_MODE and TPM2_MODE defines have to be added to vboot and payload
cflags to make them build correctly without requiring payloads to provide
defines.

Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Change-Id: I567a9f04d7089699840dc7e0a063cf3030fb934b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62516
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2022-03-03 22:38:59 +00:00
Sean Rhodes 9f091608b2 payloads/tianocore: Convert BMP at build time
Convert BMP to the correct format at build time, which removes the
requirement for any runtime checks.

Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: I4f1e9c8df2ca7d66f362f9fa5688d6cb443c2581
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61918
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2022-02-25 20:45:02 +00:00
Sean Rhodes 4a9be9f321 payloads/tianocore: Pass SD_MMC_TIMEOUT build option
By default, edk2 allows 1000000μs for SD Card Readers and eMMC to
initialize which is excessive and causes a boot delay. This makes
the value configurable and uses a default of 1000μs which is sufficient
for the majority of readers. The value of 1000μs was hardcoded in
MrChromeBox's fork for around 2 years with no reported issues.

Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: I873bcddf6f37a9eaae5c84991b3996d51fb460d3
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61902
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2022-02-25 20:44:42 +00:00
Sean Rhodes 3f3a3eeca7 payloads/tianocore: Add option for to prioritize internal devices
Add TIANOCORE_PRIORITIZE_INTERNAL which, when enabled, will build edk2
with boot from internal devices before external devices.

Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: Ib1f73c8f3f2f2376cdc197b58d259446dc5f0138
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61797
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2022-02-24 00:29:44 +00:00
Sean Rhodes 4600c25346 payloads/tianocore: Add option for PS/2 keyboard support
Add TIANOCORE_PS2_SUPPORT which, when enabled, will build edk2
with PS/2 keyboard support.

Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: Ibabce6ac1ac68ab958610d42c77f3c2c494528ef
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61760
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2022-02-24 00:29:29 +00:00
Sean Rhodes f33ddb3959 payloads/tianocore: Add option to include EFI Shell
Add TIANOCORE_HAVE_EFI_SHELL, which when enabled, will build edk2
with the EFI Shell binary.

Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: I1272f514e3f5becfe1fddd58ca0d820c5d1c1b54
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61759
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2022-02-24 00:29:14 +00:00
Sean Rhodes 14d67b3515 payloads/tianocore: Add option to use follow BGRT spec
Adds TIANOCORE_FOLLOW_BGRT_SPEC which, when enabled, will follow
the BGRT Specification implemented by Microsoft and the Boot Logo
will be vertically centered 38.2% from the top of the display.

Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: If508166fe657d1cc032dd09a0fa231c7b60d9846
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61758
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2022-02-24 00:29:01 +00:00
Sean Rhodes c8decce31c payloads/tianocore: Add option to use Escape for Boot Manager
Add TIANOCORE_BOOT_MANAGER_ESCAPE which, when enabled, will use
Escape as the hot-key to access the Boot Manager. This replaces
the default key of F2.

Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: I1e60d116367542f55f0ffa241a6132e4faabe446
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61757
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2022-02-24 00:28:47 +00:00
Nico Huber 47722cfe55 libpayload/lpgcc: Add `--gc-sections` linker argument
To be able to link libcbfs without vboot, we need garbage
collection now.

Change-Id: Id9a9fe7efb9fb4409a43ae8357f4f683618805d2
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62247
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2022-02-23 22:47:24 +00:00
Nico Huber 4fa9f2ae8b libpayload/x86: Fix boot_device_read() and hook it up
Casts from integer to pointer are usually a case for phys_to_virt().

Change-Id: I861d435ff2361cdc26a2abd46d43b9346fa67ccc
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62246
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2022-02-23 22:47:09 +00:00
Sean Rhodes 0884f21042 payloads/tianocore: Rework Makefile
Rework edkii makefile so that the various build options are
unified between CorebootPayloadPkg, uefipayload_202107 and
upstream.

This sets the project directory based on the git repository name
i.e. https://github.com/mrchromebox/edk2 becomes mrchomebox

Also builds to $(obj)/UEFIPAYLOAD.fd and allows using a commit
ID without a branch.

Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: I3cc274e7385dd71c2aae315162cc48444b7eaa5f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61620
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Martin Roth - Personal <martinroth@google.com>
2022-02-22 18:53:17 +00:00
Jakub Czapiga 0ac5ed4490 libpayload/vboot: Enable vboot and x86 SHA extension for ChromeOS
Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Change-Id: Ia63d44de5440b87cedb35ff92edaa0f35ccd75a4
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62122
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2022-02-21 15:18:55 +00:00
Jakub Czapiga b17f1cebcb libpayload/vboot: Add missing quotes enclosing values
Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Change-Id: I1a72ea63a46dedd1fc2e1e53bf7714ad70ebc5e1
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62171
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2022-02-21 15:18:38 +00:00
Jakub Czapiga 7f663ab3e6 libpayload/vboot/Makefile.inc: Add strip to kconfig-to-binary macro
Lack of strip made it required to pass arguments to the
kconfig-to-binary macro without spaces. Strip fixed invalid behavior of
this macro.

Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Change-Id: I9889b45f773b9675fae287086d324c180c505a4b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62133
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2022-02-21 15:18:24 +00:00
Jakub Czapiga e904d9ad67 libpayload/cbfs: Add missing new line at the end of error messages
Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Change-Id: Ieec281e4f1c67e40976892b3dd1780d2f3802df4
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62125
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2022-02-21 15:15:37 +00:00
Sergii Dmytruk a816c29882 payloads/external: add skiboot (for QEMU/Power9)
Add an option to build skiboot as a payload. This makes QEMU Power9
board simpler to use as skiboot is necessary anyway.

Change-Id: I0b49ea7464c97cc2ff0d5030629deed549851372
Signed-off-by: Igor Bagnucki <igor.bagnucki@3mdeb.com>
Signed-off-by: Krystian Hebel <krystian.hebel@3mdeb.com>
Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58656
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>
2022-02-16 15:39:19 +00:00
Jakub Czapiga 5b76ae9611 libpayload/libc/coreboot: Fix CBFS MCache size
CBFS MCache size was assigned a value of the coreboot tables entry size
instead of the MCache size.

Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Change-Id: I8a8c3a10c6032121b4c5246d53d2643742968c09
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61714
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2022-02-10 12:49:14 +00:00
Patrick Georgi 49f0f9a422 libpayload: Refer to vboot source consistently
Don't assume that libpayload is built from a fully checked
out coreboot tree.
There's already an override when building vboot, so reuse
that override when referring to its header files.

Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Change-Id: I503c69a593dd68b3a974fbdbb64d7bb25d6c7f63
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61427
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Rob Barnes <robbarnes@google.com>
2022-01-28 14:47:38 +00:00
Paul Menzel bf52cdbca1 Revert "SeaBIOS: Update stable release to 1.15.0"
This reverts commit 2a8de6dafb.

SeaBIOS 1.15.0 regresses on systems with NVMe devices [1]:

> Greetings! Was this patch set tested on bare metal hardware? I'm
> seeing "GRUB loading: Read Error" when attempting to boot from NVMe on
> various Purism Librem devices (Intel Skylake thru Cometlake hardware).
> Reverting this series resolves the issue.

So, revert back to SeaBIOS 1.14.0.

[1]: https://mail.coreboot.org/hyperkitty/list/seabios@seabios.org/message/SRECAGH4NE3XPDWJ2YI526L5LPSJWENJ/

Change-Id: If2ec738d478f11b203f499eaa28197357de6630d
Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61179
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2022-01-24 18:18:21 +00:00
Jakub Czapiga 28a97a2ae5 libpayload/Makefile.inc: Fix ar calls to support llvm-ar
llvm-ar does not support "open" script command, and fails with an error.
This patch fixes it by removing lines `$(AR) rc <object-files>` and
it puts them as "addmod" commands. This way all object files and
archives can be packed into one archive.

Change-Id: I0c53d1d613b5edc321e268d1d996fac3146680f8
Signed-off-by: Jakub Czapiga <jacz@semihalf.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61182
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <patrick@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2022-01-20 09:22:26 +00:00