Commit Graph

3016 Commits

Author SHA1 Message Date
Patrick Georgi 55ea013842 abuild: give --silent the silent treatment
It's obsolete and without effect.

Change-Id: I17c1f8bffc2048a79de58cdc2a70651796db6ba6
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/20390
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2017-07-11 11:37:14 +00:00
Patrick Georgi 8f2cdad882 crossgcc: Prefer gnatgcc over gcc if available
For distros that package and version gnat independently from gcc (such
as Ubuntu), try to build with gnatgcc first.
This fixes the issue of gcc -print-prog-name=gnat1 failing because gcc
is of a different version.

Change-Id: Icec6d1fba8855e88ac91d47842dcb7f6b9d35461
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/20517
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-07-11 06:08:16 +00:00
Patrick Georgi 4eb84cf878 util/crossgcc: Fix typo
buildgcc was copied to $DEST/share/buildgcc-$VERSION-, missing the
commit id description.

Change-Id: I83d2074b6466b0d99507845dc714a11ab2c58271
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/20487
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-07-07 19:05:44 +00:00
Patrick Georgi 50bda05e46 util/cbfstool: demote FV handling errors to debug
It's rather normal that a few bytes are skipped.

Change-Id: I9371afdbb3ad05de7645bfbf257e4f4bfa2feddb
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/20469
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-07-07 09:01:29 +00:00
Patrick Georgi 8320b9a997 util/cbfstool: demote not-ELF error to debug
It's irritating when adding tianocore payloads - those are not
ELF, but that's deliberate.

Change-Id: I76d9367b28545348f526e5f0b8216f9ff2a3d636
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/20468
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-07-07 09:01:28 +00:00
Martin Roth d16022bdd4 util/abuild: Update abuild
- Improve logging
- Add location of logfiles to failed board log.
- Log when the shared utilities fail to build.
- Log passing configs and print count of tested configs that passed.
- Disable a couple of shellcheck warnings.
- Remove some unused code.

Change-Id: Ic2cf1c0a5f123d759aac7ce55092ad71314a8c9d
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/20359
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2017-06-29 14:42:50 +00:00
Martin Roth edd591d8ca util/lint: Update checkpatch & files to upstream linux
- Update checkpatch.pl to version 522b837
(checkpatch: warn when formats use %Z and suggest %z)

- This update moves the const_struct definitions into an external file.
coreboot will want to update this file, but for now I'm just pulling it
in directly from the linux tree.

- Update spelling.txt used by checkpatch.pl to version 505d308
(scripts/spelling.txt: add "overide" pattern and fix typo instances)

- Add better notes where things have been changed for coreboot to make
future merges easier.

Change-Id: I0ef067874fe7b1d23276a10e63858895d6083f69
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/18810
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-06-29 14:42:26 +00:00
Arthur Heymans 4988af8ca8 util/superiotool: Check for libpci before builing
Check is adapted from inteltool's Makefile.

Change-Id: Ife01ef20d9284cb0a68719757856f9a66a4de452
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/19074
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-06-28 00:49:32 +00:00
Stefan Reinauer 42b37f537f clang: Allow initializer overrides
In the code we do the following in a number of places
to pre-initialize an array with a certain value before
overwriting some of the array with other values:

 u8 mainboard_picr_data[FCH_INT_TABLE_SIZE] = {
    [0 ... FCH_INT_TABLE_SIZE-1] = 0x1F,
 }

clang does not like that behavior unless we specify
the option -Wno-initializer-overrides.

Remove the check for gcc in those places, too, because
 1) it would silently change array contents between compilers
 2) the check isn't sufficient to determine compilation on
    clang vs gcc

Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Change-Id: I93cc121b6fec099fcdbd5fd1114c2ff7cbc291dc
Reviewed-on: https://review.coreboot.org/20384
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-06-27 23:54:03 +00:00
Patrick Georgi 0b4d5648f2 xcompile: silence clang when referencing packed structs' members
clang complains that the access might be unaligned. Yes, we know. Yes,
that's exactly what we want. You have _one_ job.

Change-Id: I5400f50d8b5b462270c700f7ff90d9d517278e71
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/19659
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2017-06-27 23:53:47 +00:00
Patrick Georgi f138320f9e xcompile: Also try clang variants under the $triplet-clang scheme
That seems to be the more reliable way to build clang cross compilers
for now.

Change-Id: I14fe767d20f91b64e96c909291760bddcd108e5c
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/19660
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-06-27 20:57:34 +00:00
Martin Roth 037dbe42d7 util/lint: Add check to make sure 'coreboot' is lowercase
- Excludes certain phrases which can't be changed.
- Checks last commit message if code is in a repo.

Change-Id: I6b52342488dacc56ef6083db5503507af35d41ac
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/20032
Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2017-06-27 18:59:24 +00:00
Martin Roth a564811e71 util: change coreboot to lowercase
The word 'coreboot' should always be written in lowercase, even at the
start of a sentence.

Change-Id: I0a024d82d331c0794fe087e440b4e1924129a13c
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/20030
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-06-27 18:26:01 +00:00
Nico Huber cd87e1ba2d buildgcc: Adapt messages about GNAT and bootstrapping
Don't ask for bootstrapping in case of a different host GCC major
version. GCC's versioning scheme changed starting with the release
of GCC 5. There are no big changes between the versions any more.
Instead, show the message when the host GCC's version is below 4.

In case GNAT can't be found, ask the user to abort and install it.
Also give hints for Ubuntu where the package versions are a little
messy (e.g. the meta packages gcc and gnat often point to different
versions).

In case GNAT is found but is too old (< 4.9), enable bootstrapping
by default and tell the user that building will take longer.

In all three cases show a timeout to draw the user's attention.

v2: Update GNAT check to also look for `gnatbind`. It has to be
    somewhere in $PATH.

Change-Id: I4d9de11d7469e137ede8ad138296d20c0f8ba78f
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/20332
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-06-27 18:24:29 +00:00
Nico Huber 18c74d69af buildgcc: Rename quit() to exit_handler()
"quit" is a signal name. The FreeBSD `sh` interprets

    trap quit 1 2 3 15

as command to reset all the respective signal handlers, instead
of setting quit() as handler.

Change-Id: I69b813ab583f15a9dd89a115f7aea66d966f981b
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/20391
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-06-27 18:24:10 +00:00
Martin Roth 33906d2347 util/blobtool: add spec files for DDR3 SPDs
Because of how blobtool works, we need different files for the 128 and
256 byte versions.

Change-Id: I9a3a532515eaeeb65ae05ce4f7a37c88500c6193
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/20094
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2017-06-27 16:06:53 +00:00
Patrick Georgi df9a71443e util/crossgcc: Fix building gcc 6.3.0 with clang
It assumes that __builtin_longjmp takes a void **, which is decidedly
distinctive from void *.

Change-Id: I1930bb01dd62bd6abf0688b118236db2a9299e40
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/20366
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-06-27 05:27:56 +00:00
Patrick Georgi a7a5a56370 crossgcc: Fix building with clang++ in the presence of gcc
Some environments (<grumble>cros_sdk</grumble>) provide gcc as $CC and
clang++ as $CXX. The latter needs the higher bracket-depth while the
former has no idea what it means, so tell CC and CXX individually.

Change-Id: I72b75fb9bb5df3a9b1561ee8821ec43ada29b24f
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/20365
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-06-27 05:27:53 +00:00
Lee Leahy 6796d787c5 libpayload: Enable building libpayload with march=i586
Add a Kconfig value to enable building libpayload with the 586 compiler.
Update the cross compiler script to add the Kconfig value name that is
used when libpayload builds.

The Quark SOC does not support some of the instructions generated with
the 686 compiler (e.g. CMOV).  Success occurs when
payloads/libpayload/build/config.h indicates that
CONFIG_LP_USE_MARCH_586=1.

TEST=Build and run on Galileo Gen2.

Change-Id: I04907e9a38ee139bae2e8b227821f54614707c25
Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Reviewed-on: https://review.coreboot.org/20322
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Martin Roth <martinroth@google.com>
2017-06-26 23:14:05 +00:00
Nico Huber 08bb837268 buildgcc: Allow environment to override $CC/$CXX
Also check for the presence of the given commands or "gcc", "cc" in this
order if $CC is empty. To untangle the given compilers from boostrapped
ones, introduce hostcc() and hostcxx() functions that return the respec-
tive compilers to be used.

Change-Id: Ic947be53eec25331173ac82ed742017ca3fbf83c
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/20331
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-06-26 20:28:27 +00:00
Martin Roth d55f5ebe44 crossgcc/buildgcc: update file location code
- Change from 'which' to 'command -v'. 'which' is not a posix command.

Change-Id: Icdf18e7e496447157554b8e61b1528f03456536d
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/20230
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2017-06-25 08:45:05 +00:00
Stefan Reinauer 72dc21cb7c xcompile: Fix clang compiler runtime detection
clang, like gcc, needs a compiler runtime library. Unlike gcc, it can
use either its own runtime library (compiler-rt), or gcc's version
(libgcc). Also unlike gcc, the version of clang that is currently part
of our reference toolchain does not provide the necessary versions of
compiler-rt for all platforms we support. Hence, for now, use libgcc
even on clang builds.  This patch allows switching between the two, but
switching to compiler-rt will break clang builds, unless someone fixes
our reference toolchain to provide libclang_rt.builtins-${ARCH}.a for
each of our supported platforms.

Change-Id: I5001a4b62ed34df19312f980b927ced8cbaf07db
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/20303
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
2017-06-25 01:38:13 +00:00
Stefan Reinauer 81693d41b1 crossgcc: cosmetic overhaul of output
Straighten up output from the buildgcc script

Change-Id: Iee6775b97560063bbdff0d31ceab2dddc58783b3
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/20302
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2017-06-22 23:24:41 +00:00
Stefan Reinauer c66fd3c267 crossgcc: Rename print_stable to print_supported
That's what the option is called in the help text. Not
sure where the divergence came from, so let's fix it.

Change-Id: I621aa203da2d314b93de665dbdadbe4a43725375
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/20301
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2017-06-22 23:24:29 +00:00
Stefan Reinauer ca117e7f49 crossgcc: Update to clang 4.0
Drop Edward's cfe patch because it has been implemented by
upstream clang differently. Instead of

 $ clang --print-librt-file-name

the right way to get ahold of the compiler-rt builtin library is

 $ clang -rtlib=compiler-rt --print-libgcc-file-name

Change-Id: I8aac5256da5bfb6f7bebeff0959f16b53867c581
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/20274
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-06-21 18:17:54 +00:00
Stefan Reinauer 3b5934936e Add CMake 3.9.0-rc3 to coreboot toolchain
Newer versions of clang will need newer versions of CMake (at least
3.4.3) to compile. This patch will enable us to switch to clang 4.0.

Change-Id: I6c91163ce0efd4eb2410cdb433de8be23d510ecd
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/20273
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2017-06-21 18:17:34 +00:00
Patrick Georgi 8f8668d87f util/scripts/gerrit-rebase: allow skipping old history
This might provide a minor speedup but more importantly it allows
skipping commits without Reviewed-on line (which we have a couple of
due to mistakes with git push).

To use, add a line starting with "Gerrit-Rebase-Ignore-CLs-Before:"
pointing out a match string (ie "something that comes after Reviewed-on")
prior to which no changes are considered on the originating branch. The
target branch is still fully considered to avoid issues with changes
that were retargetted out of order around the new cut and would then
make a reappearance (or be skipped).

Change-Id: I9f2679891e93f6d28a781315aebd2aa60a1e3b23
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/20185
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
2017-06-19 18:44:13 +02:00
Philipp Deppenwiese 9a848dde8b util/crossgcc: Fix musl libc support
Disable NLS for libelf.

Change-Id: Ia4d01393771ccdff9e0498d7efd1bbdd11cff8db
Signed-off-by: Philipp Deppenwiese <zaolin@das-labor.org>
Reviewed-on: https://review.coreboot.org/20235
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
Reviewed-by: Martin Roth <martinroth@google.com>
2017-06-17 20:00:03 +02:00
Nico Huber cde2bdf496 inteltool/Makefile: Clean .dependencies too
Change-Id: Ib4fc326c6612f2d142c8a5220949fbb4b97c37a1
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/20176
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-06-14 12:54:40 +02:00
Nico Huber cce508fed2 inteltool/Makefile: Separate CPPFLAGS from CFLAGS
Separate the required CPPFLAGS from environment overridable CFLAGS.

Change-Id: I0c1c0a1cebc7f7971634bf57d4a2370939c43fda
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/20175
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Hannah Williams <hannah.williams@intel.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2017-06-14 12:54:36 +02:00
Julius Werner be3aa04f21 cbmem: Escape literal asterisks in log banner regex
I had a stupid. :( Asterisks have a special meaning in regexes, but I
just wanted to match three literal ones. This kills the regex parser.

Change-Id: Ia6149e72715d651c914583ed3235680ce5b7a2e0
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/20171
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
2017-06-14 02:17:14 +02:00
Paul Menzel 459d2198eb msrtool: Remove `no-pic` from `CFLAGS`
Commit 7c634ae8 (msrtool: added support for Intel CPUs) adds `no-pic` to
the compiler flags.

GCC 7.0.1 20170316 fails to built with the error below.

```
/usr/bin/ld: msrtool.o: relocation R_X86_64_32 against `.rodata.str1.1' can not be used when making a shared object; recompile with -fPIC
/usr/bin/ld: msrutils.o: relocation R_X86_64_32 against `.rodata.str1.1' can not be used when making a shared object; recompile with -fPIC
/usr/bin/ld: sys.o: relocation R_X86_64_32 against `.rodata.str1.1' can not be used when making a shared object; recompile with -fPIC
/usr/bin/ld: linux.o: relocation R_X86_64_32 against `.rodata.str1.1' can not be used when making a shared object; recompile with -fPIC
/usr/bin/ld: freebsd.o: relocation R_X86_64_32S against `.data' can not be used when making a shared object; recompile with -fPIC
/usr/bin/ld: final link failed: Nonrepresentable section on output
```

Removing the flag causes the build to succeed with GCC 7, 6.3, and clang
4.0.

Change-Id: I3d7aed27ce7f84aa27305c68e2d5f14607c58ec8
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: https://review.coreboot.org/18907
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Tauner <stefan.tauner@gmx.at>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-06-09 16:32:54 +02:00
Nico Huber 21e7424fc9 inteltool: Add Skylake PCI id in memory.c
Change-Id: I751e887bd90a258a69d13ea4ee9a409c8c86a3c3
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/19591
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-06-09 16:25:20 +02:00
Paul Kocialkowki 37afb270b4 crossgcc: Resolve pointer and integer comparison in GCC
GCC version 7 is being a bit picky about pointer and integer comparison
by default, which triggers a crossgcc build error.

This backports a patch from upstream GCC to fix the issue.

Change-Id: I8b1e806c10604c0df080ac5edc667bf1141e2c17
Signed-off-by: Paul Kocialkowki <contact@paulk.fr>
Reviewed-on: https://review.coreboot.org/20103
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-06-08 23:29:15 +02:00
Martin Roth 811d93af39 util/lint: Give better warning for help spacing issue
Because the help block uses significant whitespace to determine whether
or not text is inside the help block, a mixture of spaces and tabs
confuses the parser.
If there's an unrecognized line, and the previous line was inside a help
block, it's likely that this line is too.

Additionally, this was found with a line that started '  configuration',
and threw a perl warning about an uninitialized value because the parser
thought this was the start of a new config line, but couldn't find the
symbol.  Now we make sure that config statements have whitespace after
the 'config' statement.

Change-Id: I46375738a18903b266ea9fff3102a1a91235e609
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: https://review.coreboot.org/19155
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-06-07 23:13:38 +02:00
Martin Roth 8849f3be4a util/lint/kconfig_lint: update help checking
- Turn the check for help text with no indentation from a warning to
an error.
- Show an error if the help text is at the same indentation level as
the 'help' keyword.

Change-Id: Ibf868c83e2a128ceb6c4d3da7f2cf7dc237054e6
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/19851
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2017-06-07 23:12:40 +02:00
Paul Menzel d2bbaffe40 abuild: Remove space before tab
Fix up commit 26174c97 (abuild: Build saved config files)
unintentionally adding a space before a tabulator.

Change-Id: Ic51dee6ed9d640335c2bde5bd5dfad3691c505e0
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: https://review.coreboot.org/17778
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-06-07 20:37:35 +02:00
Paul Menzel 59e2113670 Use www.coreboot.org over coreboot.org
<https://coreboot.org> is redirected to <https://www.coreboot.org>.

```
$ curl -I https://coreboot.org
HTTP/1.1 301 Moved Permanently
Server: nginx/1.8.1
Date: Mon, 05 Jun 2017 10:41:33 GMT
Content-Type: text/html
Content-Length: 184
Connection: keep-alive
Location: https://www.coreboot.org/

```

So use the command below to use the final location to save a redirect.

```
$ git grep -l https://coreboot.org \
| xargs sed -i 's,https://coreboot.org,https://www.coreboot.org,g'
```

Change-Id: I4176c20ef31399f0063b41e3a0029cca0c1b0ff3
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: https://review.coreboot.org/20035
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-06-07 12:05:44 +02:00
Paul Menzel a8843dee58 Use more secure HTTPS URLs for coreboot sites
The coreboot sites support HTTPS, and requests over HTTP with SSL are
also redirected. So use the more secure URLs, which also saves a
request most of the times, as nothing needs to be redirected.

Run the command below to replace all occurences.

```
$ git grep -l -E 'http://(www.|review.|)coreboot.org'
| xargs sed -i 's,http://\(.*\)coreboot.org,https://\1coreboot.org,g'
```

Change-Id: If53f8b66f1ac72fb1a38fa392b26eade9963c369
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: https://review.coreboot.org/20034
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-06-07 12:04:50 +02:00
Iru Cai 7f46fff24c superiotool: Add SMSC KBC1126
Device ID is read from HP Elitebook 2760p.

Based on:
- superio/smsc/kbc1100 (LDNs, keyboard, EC)
- DSDT from OEM firmware (COM1 and mailbox)
- Datasheet "KBC1122 Priliminary DS Rev. 0.8"

Change-Id: Id172ae42411a6d42a4ae7c7f30f96aeda3e6c384
Signed-off-by: Iru Cai <mytbk920423@gmail.com>
Reviewed-on: https://review.coreboot.org/18480
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2017-06-06 21:13:16 +02:00
Arthur Heymans 54fd92bc34 util/cbfstool/lz4frame.c: Add comment to fall through
GCC7 has a new feature called -Wimplicit-fallthrough enabled by
default which checks for fallthrough in switch statements which is a
common error. When a fallthrough is actually intended a comment saying
so will satisfy GCC.

Fixes cbfstool not building with GCC7.

Change-Id: I83252fc96be7ce0971d4251b0fc88fbbd7440e71
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/20036
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2017-06-06 19:37:21 +02:00
Nico Huber 3af6985050 util/nvramtool: Bail out on unaligned multi-byte entries
coreboot doesn't support CMOS options that are not byte aligned but
span multiple bytes. So treat them as error.

Change-Id: I2bcff62f153932e9c6646b4ce08e8da1c1532947
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/18246
Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2017-06-06 19:31:38 +02:00
Nico Huber af83db2659 inteltool: #include <commonlib/helpers.h>
Change-Id: I66a243486a347313103ffd2cb2ca0447228e4054
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/19586
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-06-06 17:46:54 +02:00
Nico Huber c269211149 buildgcc: Fix color output in download_showing_percentage
Probably this was never tested as the return to no color "\033[0m"
was printed verbatim.

Change-Id: I7e6e1049b062ffb138ebdaeb62ddc49581ff8db1
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/19811
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-06-06 17:45:15 +02:00
Nico Huber c272a87f5c inteltool/ahci: Don't print reserved, all-zero registers
Behavior matches with other dumps of inteltool.

Change-Id: Id9755d251fc42185c9e8d574deb55c76e129b718
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/19585
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-06-06 17:34:57 +02:00
Nico Huber da94e171b5 inteltool/ahci: Add Skylake support
The SATA device moved from 0:1f.2 to 0:17.0, 0:1f.2 became PMC. We
detect that by checking the PCI device class.

The ABAR MMIO space has grown to 2KiB and up to 8 ports are supported
now. For backwards compatibility, only dump port registers of ports
that are enabled in the Ports Implemented (PI) register.

Change-Id: I8e0f07d7359d92f689882b5afefa5ffb3766ee8b
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/19584
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-06-06 17:27:10 +02:00
Nico Huber 0660c6c1ff inteltool: Fix clean-up and close related TODO
We have to call pci_free_dev() for each device we allocated with
pci_get_dev(). Since that's not the case for `sb`, we can close
this TODO.

Change-Id: I1ef80c837263a205467f835156dcb8fa667d3a8f
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/19587
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-06-06 17:22:12 +02:00
Nico Huber ed9c9ce268 inteltool: Add first Skylake PCI IDs
Change-Id: Ia5ef6b04f01e381174a4d8f73ddafeb18d488803
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/19583
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-06-06 17:19:50 +02:00
Nico Huber ac826c8fd7 inteltool: Don't use PCI_FILL_SIZES
This is supposed to fill the `size[]` array with the actual sizes of
a device' MMIO ranges, but apparently isn't implemented for every
access method in libpci (we let the library choose one). It tells us
by clearing `PCI_FILL_SIZES` in the return value of `pci_fill_info()`
(which we don't check). Since we don't ever use `size`, we can just
make it clear and don't ask for it.

Change-Id: I3fb9334472f1c7563a9e17910190f73affbe067a
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/19582
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-06-06 17:19:45 +02:00
Youness Alaoui c4b4ff3b1f console/flashsconsole: Add spi flash console for debugging
If CONSOLE_SPI_FLASH config is enabled, we write the cbmem
messages to the 'CONSOLE' area in FMAP which allows us to grab the
log when we read the flash.

This is useful when you don't have usb debugging, and
UART lines are hard to find. Since a failure to boot would
require a hardware flasher anyways, we can get the log
at the same time.

This feature should only be used when no alternative is
found and only when we can't boot the system, because
excessive writes to the flash is not recommended.

This has been tested on purism/librem13 v2 and librem 15 v3 which
run Intel Skylake hardware. It has not been tested on other archs
or with a driver other than the fast_spi.

Change-Id: I74a297b94f6881d8c27cbe5168f161d8331c3df3
Signed-off-by: Youness Alaoui <youness.alaoui@puri.sm>
Reviewed-on: https://review.coreboot.org/19849
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
2017-06-04 18:44:56 +02:00
Ronald G. Minnich 8db3c2a485 ifdtool: avoid potential unaligned pointer usage
In get_region, ifdtool assigns a not-known-to-be-aligned
pointer to a uint32_t *. Now you know and I know that it is
almost certainly aligned, but clang on OSX doesn't like this,
and it's a dicey thing to do in any event, just waiting
to hit someone hard at some future date.

Assign the pointer to a void * and use memmove to copy
the value to a uint32_t.

This usage is more portable to all little-endian architectures,
now, but is still not endian-safe. I doubt we'll ever care.

Change-Id: Ifb2f260c3363ab0f5b4a59e5a4e0b5ecf049fa96
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-on: https://review.coreboot.org/19921
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-06-02 01:58:20 +02:00
Martin Roth 16c49b5ff5 util/abuild: Start junit testcase block on kconfig failure
This should allow Jenkins to parse the build failures when Kconfig
generates an error.

Change-Id: I5f9083c346ac7b6502f854b7e1f1054e81954d76
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/19861
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-05-27 16:54:23 +02:00
Mike Frysinger a8ca03223a cbfscomptool: fix display of time_t
Not all systems have sizeof(time_t) == sizeof(long), so
cast the delta here to a long to match the %ld format.

Change-Id: If235577fc35454ddb15043c5a543f614b6f16a9e
Signed-off-by: Mike Frysinger <vapier@chromium.org>
Reviewed-on: https://review.coreboot.org/19902
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2017-05-27 01:45:17 +02:00
Patrick Georgi 6b697ef207 util/hugo: no need to enable an interactive terminal
Change-Id: Iac4cdb003b2fe967b303c1f8e0eeb61673a02858
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: https://review.coreboot.org/19930
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: Patrick Georgi <pgeorgi@google.com>
2017-05-26 18:36:47 +02:00
Patrick Georgi dc5eea1cfa util/hugo: mark source mounts read-only
hugo has no need to write there, it should only write to the
output directory.

Change-Id: Ie320f5017feccfa2e9ecba3c802e040487b44d67
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: https://review.coreboot.org/19929
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-05-26 18:36:19 +02:00
Patrick Georgi 04edaefad7 util/hugo: Add framework to build www.coreboot.org/Documentation
www.coreboot.org/Documentation is now built with hugo (www.gohugo.io)
based on files in this repo's /Documentation directory.

Also clarify that new additions to Documentation are under CC-BY 4.0 terms.

Change-Id: I000e15b29a182bb88b40de3d0178bf8cc54ba8af
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: https://review.coreboot.org/19881
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2017-05-25 23:04:36 +02:00
Patrick Georgi 9ec25f7678 util/lint: ignore some more binary file types
Namely png (images) and eot, ttf, woff (fonts)

Change-Id: I41e773c0adab796876a3b1e91e089ae89cbb04df
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: https://review.coreboot.org/19880
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2017-05-25 23:04:29 +02:00
Julius Werner d906bb68c3 cbmem_console: Improve 'cbmem -1' behavior for truncated pre-CBMEM logs
The 'cbmem -1' flag that cuts off console output before the last boot
will ignore content from earlier stages if it was truncated due to lack
of pre-CBMEM console space. This patch makes the "log truncated" message
more specific and adds it as an additional cut-off marker to 'cbmem -1'
to counteract that problem.

Also raise the log level of the coreboot banner one step to BIOS_NOTICE
to make it more likely to be included in the output for 'cbmem -1' to
find. (I believe NOTICE is reasonable but I wouldn't want to go as far
as WARN which should be reserved for actual problems. Of course this is
not ideal, but then again, our whole log-level system really isn't... it
would be better if we could make it always print a banner to the CBMEM
console without affecting the UART at the same time, but that would
require a larger amount of work.)

Change-Id: I58288593dfa757e14f4a9da4ffa7e27b0b66feb9
Reported-by: https://ticket.coreboot.org/issues/117
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/19720
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-05-18 19:49:43 +02:00
Martin Roth 7a00a63829 util/release: Update build-release script
- Put parameter comments and help text in the same order as the actual
parameters.
- Don't clone a new release tree from coreboot.org if a tree already
exists.
- Change COMMIT_ID parameter from optional to required.  If it was
omitted previously, the head of the master branch would be used.

Change-Id: Ifa434a4911dec777004788e3cf4e3436875d929b
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/19126
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2017-05-16 10:54:06 +02:00
Patrick Georgi 6d3ce3a996 xcompile: replace -print-librt-file-name with -print-libgcc-file-name
The former only exists with a custom patch while the latter is supported
by clang and in the absense of libgcc even points to clang's own runtime
libraries.

Change-Id: I1e30d5518cf78e1d66925d6f2ccada60a43bb4f8
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/19658
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
2017-05-16 10:52:37 +02:00
Aaron Durbin 7ad44eed08 util/cbmem: mmap underflow on low addresses
There is code to adjust the mapping down if a mmap fails
at a physical address. However, if the address is less
than the page size of the system then the physical offset will
underflow. This can actually cause a kernel panic on when
operating on /dev/mem.

The failing condition happens when the requested mapping at 0
fails in the kernel. The fallback path is taken and page size
is subtracted from 0 making a very large offset. The PAT code
in the kernel fails with a BUG_ON in reserve_memtype() checking
start >= end. The kernel needs to be fixed as well, but this
fallback path is wrong as well.

BUG=b:38211793

Change-Id: I32b0c15b2f1aa43fc57656d5d2d5f0e4e90e94ef
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/19679
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2017-05-15 19:45:49 +02:00
Iru Cai 5fd00ce71a util: Add tools for dumping and inserting KBC1126 firmware images.
Change-Id: Ic521b177b9602ff042312cccaaa89371db7c5855
Signed-off-by: Iru Cai <mytbk920423@gmail.com>
Reviewed-on: https://review.coreboot.org/19071
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2017-05-11 16:48:40 +02:00
Paul Menzel 10984d1034 intelmetool: Enable warning *set-but-unused-variable*
There are no GCC warnings anymore about set but unused variables, and
Clang warns about this switch, as it doesn’t know it.

So remove the switch to use the default set by the switch `Wall`.

Change-Id: Ie9eb26d4f8b298af231b952b547b71d68c649eaf
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: https://review.coreboot.org/19613
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2017-05-11 16:42:11 +02:00
Paul Menzel 90d41779d1 intelmetool: Comment out unused variable
Only commented out code uses the variable `csr`, and GCC complains about
it, when enabling the warning *unused-but-set-variable*.

```
Checking for pciutils and zlib... me.c: In function ‘mei_dump’:
me.c:50:18: warning: variable ‘csr’ set but not used [-Wunused-but-set-variable]
  struct mei_csr *csr;
                  ^~~
```

As the code is commented, also comment out the declaration of the variable.

Change-Id: I4ecb2b5e9f32906ccfc8a0628d2e0f2d3ad39a02
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: https://review.coreboot.org/19612
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-05-11 16:41:56 +02:00
Vincent Legoll 0d2ff132e6 intelmetool: Enhance missing packages help
On Ubuntu 16.04 the libpci-dev package is required.

Change-Id: I942b3e96f5b8112166a105eb5a61f8f3cf16cb7c
Signed-off-by: Vincent Legoll <vincent.legoll@gmail.com>
Reviewed-on: https://review.coreboot.org/19617
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2017-05-11 09:44:44 +02:00
Iru Cai 1f355178d6 superiotool: Add registers of LPC47N217
Change-Id: I460663593dc32f5b52c19c3f19fbc35b8252ed4d
Signed-off-by: Iru Cai <mytbk920423@gmail.com>
Reviewed-on: https://review.coreboot.org/19606
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2017-05-08 17:45:40 +02:00
Paul Menzel 57d912bacc intelmetool: Use correct type for pointer
Use `uintptr_t` instead of `uint32_t`, fixing the error below on 64-bit
systems, where pointers are 64-bit wide.

```
cc -O0 -g -Wall -W -Wno-unused-parameter -Wno-unused-but-set-variable -Wno-sign-compare -Wno-unused-function   -c -o intelmetool.o intelmetool.c
intelmetool.c: In function ‘dump_me_memory’:
intelmetool.c:85:45: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
  dump = map_physical_exact((off_t)me_clone, (void *)me_clone, 0x2000000);
                                             ^
```

BUG=https://ticket.coreboot.org/issues/111
Change-Id: Id8d778e97090668ad9308a82b44c6b2b599fd6c3
Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>
Reviewed-on: https://review.coreboot.org/19567
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
Reviewed-by: Paul Wise (Debian) <pabs@debian.org>
2017-05-06 07:54:47 +02:00
Arthur Heymans 915a4cadf4 blobtool/ifd-x200.set: Fix flashmap0 NR
NR indicates the last non empty region, which in this case is
GbE (region3). Needed for flashrom ifd layout support.

Change-Id: I3f4dcb0d41718dd176982679f8e045681fd3f486
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/19565
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2017-05-05 22:43:46 +02:00
Paul Wise e311f94279 intelmetool: handle failures to mmap MEI memory
Fixes crashes when there is an error mapping memory.

    Error mapping physical memory 0x0000004275159040 [0x4000] ERRNO=1
    Segmentation fault (core dumped)

Change-Id: I5becc0c2870dd97297c4e8d1b101b95b31792ca7
Signed-off-by: Paul Wise <pabs3@bonedaddy.net>
Reviewed-on: https://review.coreboot.org/19562
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2017-05-05 22:40:54 +02:00
Paul Wise 769f46625b intelmetool: free sb pci_dev struct allocated by pci_get_dev()
This fixes a memory leak in the activate_me() function.

Change-Id: I011b2f96122d8f88aed121352afe3f0d41edef60
Signed-off-by: Paul Wise <pabs3@bonedaddy.net>
Reviewed-on: https://review.coreboot.org/19561
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2017-05-05 22:38:20 +02:00
Paul Wise 3c02699dd7 intelmetool: Print strerror() results for mmap errors
These are more human readable for folks not familiar with errno values.

Change-Id: I21352a00b583163472ccd3302a83adf1f8396c61
Signed-off-by: Paul Wise <pabs3@bonedaddy.net>
Reviewed-on: https://review.coreboot.org/19560
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2017-05-05 22:37:28 +02:00
Omar Pakker ecf3489df8 util/autoport: Add the PCI ID of the iGPU for the Intel i7 3770K
This adds one of the Xeon labeled PCI IDs used in Sandy-/Ivy Bridge
generation processors. This ID is used by the non-Xeon i7 3770K.

Change-Id: Iad7745136efeb10ff745001413f4ccb6488b5ec0
Signed-off-by: Omar Pakker <omarpakker+coreboot@gmail.com>
Reviewed-on: https://review.coreboot.org/19516
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2017-05-03 20:14:05 +02:00
Julius Werner b7b64a9f68 cbmem: Add new command line flag to dump console for one boot only
Even though the persistent CBMEM console is obviously awesome, there may
be cases where we only want to look at console output from the last boot.
It's easy to tell where one boot ends and another begins from the banner
message that coreboot prints at the start of every stage, but in order
to make it easier to find that point (especially for external tools),
let's put that functionality straight into the cbmem utility with a new
command line flag. Use the POSIX/libc regular expression API to find the
banner string for maximum compatilibity, even though it's kinda icky.

Change-Id: Ic17383507a884d84de9a2a880380cb15b25708a1
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/19497
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
2017-05-02 21:29:42 +02:00
Patrick Rudolph 0a4a4f7ae4 mb/*/mainboard.c: Get rid of SPI AFC register
The AFC—Additional Flash Control Register is set by
southbridge code.

Remove redundant calls and get rid of it in autoport.

Change-Id: I627082e09dd055e3b3c4dd8e0b90965a9fcb4342
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/19493
Tested-by: build bot (Jenkins)
Reviewed-by: Nico Huber <nico.h@gmx.de>
2017-05-01 14:02:19 +02:00
Youness Alaoui 1244a510f1 util/inteltool: Add support for Wildcat Point-LP Premium
The Wildcat Point-LP Premium is handled the same as the Wildcat Point-LP,
but it wasn't supported by inteltool.

Change-Id: I694514e1963f074582a3f5f81d63c20e7fa49189
Signed-off-by: Youness Alaoui <youness.alaoui@puri.sm>
Reviewed-on: https://review.coreboot.org/19445
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2017-05-01 00:43:52 +02:00
Youness Alaoui 085d87bcca util/inteltool: Break long lines in supported_chips_list
Lint prevents my next commit which adds a new line to the table
so it's better to break all the > 80 character lines so it will be
consistent with the new line I'm about to add.

Change-Id: Ic7ad0cb90e861cd830db1186225d4f839250792a
Signed-off-by: Youness Alaoui <youness.alaoui@puri.sm>
Reviewed-on: https://review.coreboot.org/19444
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
Reviewed-by: Martin Roth <martinroth@google.com>
2017-05-01 00:43:38 +02:00
Patrick Georgi 97a9df4f77 crossgcc: disable libsanitizer for the bootstrapped compiler
Ironically enough, libsanitizer is notorious for creating "uninitialized
variable" warnings with different compiler versions than the one it's
shipping with.

Since we don't need it for building the real compiler, just skip it.

Fixes building our compilers using the gnat-gpl 2014 compilers.

Change-Id: I2130dfdf3eaf07d77cd70777419fc0ae4642b843
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/19478
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
2017-04-28 06:47:37 +02:00
Marc Jones d81250cebc amdfwtool: Move normal firmware 2 after fanless firmware2s
Move the images around in the image stitching. This addresses
an issue found with PSP firmware loading on the Google Kahlee
mainboard.

Note firmware1 must come before firmware2 in the image or
the PSP will not allow APU to execute.

Change-Id: I85963fa93d6efd707cedfbc04b92d302ad5de3b1
Signed-off-by: Marc Jones <marcj303@gmail.com>
Reviewed-on: https://review.coreboot.org/19170
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2017-04-27 23:27:06 +02:00
Patrick Georgi 790aab6c77 crossgcc: fix DESTDIR builds
We need to rewrite libtool's files (foo.la) a couple of times so it
knows where to look
(while still whining that $DESTDIR$TARGET != $TARGET. well, duh.)

Change-Id: I54cafd47c76d855222ba905b5eb4533a23bdfd34
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/19463
Tested-by: build bot (Jenkins)
Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-04-27 18:11:25 +02:00
Arthur Heymans 878c2de41b util/ectool: Dump ram by default
According to the comment above the default should dump the EC ram,
though is never reached since the variable 'write_addr' is not 0, but
initialized at -1.

Also removes brackets around one line statement below if to make
checkpatch.pl happy.

Change-Id: I390996b253f2f20682cd9ab2d4f560de6eccfc57
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/19152
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Alexander Couzens <lynxis@fe80.eu>
2017-04-25 18:46:04 +02:00
Arthur Heymans 2873a4aea4 util/ectool: Fix timeout on sending EC command
When setting output to verbose, it incorrectly reports that it times
out on every command.

TESTED on Thinkpad X60.

Change-Id: I24f05f0c165462d5ba2604c7e2fe139400683275
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/19151
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Alexander Couzens <lynxis@fe80.eu>
2017-04-25 18:44:46 +02:00
Aaron Durbin e4d7abc0d4 lib: provide clearer devicetree semantics
The devicetree data structures have been available in more than just
ramstage and romstage. In order to provide clearer and consistent
semantics two new macros are provided:

1. DEVTREE_EARLY which is true when !ENV_RAMSTAGE
2. DEVTREE_CONST as a replacment for ROMSTAGE_CONST

The ROMSTAGE_CONST attribute is used in the source code to mark
the devicetree data structures as const in early stages even though
it's not just romstage. Therefore, rename the attribute to
DEVTREE_CONST as that's the actual usage. The only place where the
usage was not devicetree related is console_loglevel, but the same
name was used for consistency. Any stage that is not ramstage has
the const C attribute applied when DEVTREE_CONST is used.

Change-Id: Ibd51c2628dc8f68e0896974f7e4e7c8588d333ed
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/19333
Tested-by: build bot (Jenkins)
Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
2017-04-25 18:14:38 +02:00
Martin Roth 64a3210eba util/nvidia/cbootimage: Update to upstream master
This brings in 2 new commits from the upstream cbootimage
repository, merged to the upstream tree April 12, 2016 and
July 28, 2016

64045f9 bct_dump: don't crash on devices without RSA support
ea1e03d sign.sh: Add more features

Change-Id: I3b6c0c2c855044d7fce87eff9954bce5035ca966
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/18955
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-04-24 19:19:39 +02:00
Martin Roth 2a063beb71 util/lint: Don't run checkpatch on the documentation
Change-Id: Ib95a7c9c64c481af7dcf1074ffc0fc76dc6b6ff9
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: https://review.coreboot.org/19144
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-04-24 19:18:06 +02:00
Pratik Prajapati 0bb611d125 mma: update mma setup script for v2.1018
MMA blobs internal version 2.1018 adds more tests.
This patch updates the script to accommodate that
change. MMA blobs are part of chrome private
repository.

Change-Id: Iff660fdfdfcd7acc3820c5550740276be6213877
Signed-off-by: Pratik Prajapati <pratikkumar.v.prajapati@intel.com>
Reviewed-on: https://review.coreboot.org/19259
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-04-24 19:11:34 +02:00
Martin Roth 6338189d0e util/blobtool: Update blobtool.y
- Refactor the spec & setter file reads into a separate function.
- Make sure files can actually be opened before reading from them.
- Check all malloced variables.
- Set functions with no declatations as static.
- Update blobtool.tab.c_shipped to the latest version.

Change-Id: Ie97fff84493a06f48d8673d388c3882028d048ca
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/19231
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-04-24 19:01:15 +02:00
Martin Roth 6d189cc47b util/blobtool: clean up blobtool.l a bit
- Rewrite STRING and COMMENT expressions to remove need for CHARS.
- Clean up regular expressions - get rid of unnecessary expressions.
- Remove extra newline from the end of the file.

- Clean up stripquotes() function
-- Remove unnecessary backslashes in '\"'
-- Check malloc for failure
-- Remove unnecessary assignment of 0 to the end of the new string,
snprintf will take care of it.

- Update blobtool.lex.c_shipped to the new version.

Change-Id: I002962cfae0816ed3c7a5811dfb1b8b48fdc5729
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/19230
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-04-24 19:00:45 +02:00
Julius Werner d67c6876b5 Turn CBMEM console into a ring buffer that can persist across reboots
This patch allows the CBMEM console to persist across reboots, which
should greatly help post factum debugging of issues involving multiple
reboots. In order to prevent the console from filling up, it will
instead operate as a ring buffer that continues to evict the oldest
lines once full. (This means that if even a single boot doesn't fit into
the buffer, we will now drop the oldest lines whereas previous code
would've dropped the newest lines instead.)

The console control structure is modified in a sorta
backwards-compatible way, so that new readers can continue to work with
old console buffers and vice versa. When an old reader reads a new
buffer that has already once overflowed (i.e. is operating in true ring
buffer mode) it will print lines out of order, but it will at least
still print out the whole console content and not do any illegal memory
accesses (assuming it correctly implemented cursor overflow as it was
already possible before this patch).

BUG=chromium:651966
TEST=Rebooted and confirmed output repeatedly on a Kevin and a Falco.
Also confirmed correct behavior across suspend/resume for the latter.

Change-Id: Ifcbf59d58e1ad20995b98d111c4647281fbb45ff
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/18301
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-04-20 00:29:07 +02:00
Arthur Heymans 026f7df763 util/inteltool: Add ICH10 (Consumer Base) support
Reuses ICH10R functions.

TESTED on Intel DG43GT (Not supported by coreboot)

Change-Id: If9ae8ba8b95e3a7bf6596ae639eb8cafab583298
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/19232
Tested-by: build bot (Jenkins)
Reviewed-by: Nico Huber <nico.h@gmx.de>
2017-04-15 20:06:08 +02:00
Martin Roth f411b701c5 util/blobtool & sconfig: Update GENPARSER Kconfig question
blobtool uses the same sort of update mechanism for the .l & .y files,
so update the SCONFIG_GENPARSER Kconfig question to encompass both
utilities.

- Change the name to UTIL_GENPARSER, and update the help text.
- Update sconfig's makefile.
- Add the check to blobtool's makefile.
- Update the makefiles to check for y, not defined.

Change-Id: I6215791c9a019bce37d4a150b65d1fdbb9073156
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/19229
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-04-14 17:26:48 +02:00
Martin Roth cfce793052 util/blobtool: Hook into coreboot build
Add a Makefile.inc, based on sconfig's, to use the _shipped variants
so that the build doesn't have to generate them with flex & bison.

The GENPARSER check is inactive, and will be updated in the next
commit.

Add the c_shipped & h_shipped files for the current .l & .y files.

Change-Id: Ia6c68bfb6e0611ceb6bc76cc66e43266bafc98ad
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/19228
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-04-14 17:26:30 +02:00
Julius Werner 127a79e0b6 cbmem: Add custom aligned memcpy() implementation
On some architectures (like AArch64), /dev/mem mappings outside of the
area marked as normal RAM use a memory type that does not support
unaligned accesses. The libc memcpy() implementation on these
architectures may not know or expect that and make an unaligned access
for certain source/dest/length alignments. Add a custom memcpy()
implementation that takes these restrictions into account and use it
anywhere we copy straight out of /dev/mem memory.

Change-Id: I03eece380a14a69d4be3805ed72fba640f6f7d9c
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/18300
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-04-14 16:33:27 +02:00
Youness Alaoui b85ddc787e util/intelmetool: Check for NULL return from pci_lookup_name
pci_lookup_name might return NULL from using format_name internally
which could cause a crash when trying to print that value. We
check for NULL and print a more appropriate value in that case.

Change-Id: I499f0b5e1681f3926df0d8a325aab2c666ebd632
Signed-off-by: Youness Alaoui <youness.alaoui@puri.sm>
Reviewed-on: https://review.coreboot.org/19089
Tested-by: build bot (Jenkins)
Reviewed-by: Nico Huber <nico.h@gmx.de>
2017-04-04 20:48:34 +02:00
Martin Roth 333142636f abuild: add timeless build command line parameter
Update ABUILD_VERSION for the timeless & checksum parameters.

Change-Id: I96b4c027ccf3e5563dbf4598a0d1fb5e83a5985a
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: https://review.coreboot.org/19034
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-04-04 17:47:21 +02:00
Martin Roth c7e6ad7be2 util/abuild: Save checksums of build files
- Add --checksum command line parameter to specify a base path and
filename for the checksums to be saved into.
- Save checksums of each platform into the specified file appended
with "_platform"
- Save a sha256 checksum of the sorted config.h into the base file
appended with "_config"

Change-Id: Id24dc4b10afbd35cdb8750f75b934419e6e80290
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: https://review.coreboot.org/19033
Tested-by: build bot (Jenkins)
Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-04-04 17:46:47 +02:00
Martin Roth 85782b2152 util/docker: Update makefile for servers and local use
- Add some variables to allow server customizations.
- Verify that coreboot images and containers exist before trying to
remove them.
- Add a couple of convenience targets: clean & cleanall to remove
coreboot containers and images or ALL containers and images.
- Add docker-what-jenkins-does target to run a test build locally inside
a docker image.
- Add docker-jenkins-server target to test the server configuration and
run the jenkins docker image.
- Add docker-jenkins-shell and docker-shell targets to run the
coreboot-sdk and coreboot-jenkins-server images.
- Update the help.

Change-Id: I1896f33e7eddfe3248f44ae780de65ce50d5dd99
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: https://review.coreboot.org/18004
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-04-04 01:49:59 +02:00
Youness Alaoui e0c53af470 util/intelmetool: Fix access to deleted data on stack
pci_me_interface_scan was returning (via argument 'name') a pointer
to the interface name which was stored in a stack variable.  This
caused part of the name to be printed as garbage stack data in some
situations if stack data was overwritten.

This moves the name buffer to the calling function so it can be accessed
before it gets overwritten.

Change-Id: I947a4c794ee37fe87e035593eaabcaf963b9875e
Signed-off-by: Youness Alaoui <youness.alaoui@puri.sm>
Reviewed-on: https://review.coreboot.org/19066
Tested-by: build bot (Jenkins)
Reviewed-by: Nico Huber <nico.h@gmx.de>
2017-04-04 00:22:29 +02:00
Paul Menzel deb9b03af9 cbfstool/ifwitool: Remove unnecessary assignment
Fix the warning below.

```
util/cbfstool/ifwitool.c:551:2: warning: Value stored to 'offset' is never read
        offset = read_member(data, offset, sizeof(h->fit_tool_version),
        ^        ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
```

Found-by: scan-build from clang 3.8.1
Change-Id: I6c322a335a371a20561b32e04e7dcc7310dab607
Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>
Reviewed-on: https://review.coreboot.org/18667
Tested-by: build bot (Jenkins)
Reviewed-by: Nico Huber <nico.h@gmx.de>
2017-03-29 15:43:38 +02:00
Martin Roth b4f2b15f05 util/futility/Makefile: Update clean target
- Fix clean target to pass if output doesn't exist
- Make sure $(RM) is actually defined

Change-Id: Ibcdb0e329084f58b27c3f53213a237d02c922a51
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: https://review.coreboot.org/18998
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Paul Kocialkowski <contact@paulk.fr>
Tested-by: build bot (Jenkins)
Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2017-03-29 05:16:49 +02:00
Marshall Dawson f4b9b41c47 util/amdfwtool: Add fanless SMU firmware options
The Stoney Ridge program has OPNs that are considered fanless.  These
APUs are strapped to search for unique SMU firmware, indicated by
Type[8]=1 in the directory table entry.

Add new options to amdfwtool and include the blobs in the build with
the appropriate bit set in the Type encoding.

Original-Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Original-Reviewed-by: Marc Jones <marcj303@gmail.com>
(cherry picked from commit 8df0d6847c39bb021271983018ac6f448f9ff9da)

Change-Id: I4b80ccf8fd9644f9a9d300e6c67aed9834a2c7a7
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/18991
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2017-03-28 22:26:19 +02:00