Commit Graph

7255 Commits

Author SHA1 Message Date
Ronald G. Minnich 84de16e299 Removed an unneeded include file
This file builds fine without including arch/types.h

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Change-Id: Icd38cf429576a2a1a33ebca84389526feddfc169
Reviewed-on: http://review.coreboot.org/2015
Tested-by: build bot (Jenkins)
Reviewed-by: David Hendricks <dhendrix@chromium.org>
2012-12-10 23:46:44 +01:00
Nico Huber 593f577ffa libpayload: Fix use of virtual pointers in sysinfo
In I4c456f5, I falsely identified struct cb_string.string as a pointer
which it is not. So we don't need phys_to_virt() here.

Change-Id: I3e2b6226ae2b0672dfc6e0fa4f6990e14e1b7089
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/1987
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-12-10 16:45:24 +01:00
Nico Huber c95f2f5615 libpayload: Fix renaming of REG_CLASS_DEV to REG_SUBCLASS
REG_CLASS_DEV was renamed to REG_SUBCLASS.

Change-Id: I4af476b953b544f680337d815889564f016563eb
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: http://review.coreboot.org/1986
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-12-10 16:45:00 +01:00
Stefan Reinauer 1224626e3b Revert "armv7: use __cpu_to_le32 for endianness of reset vector instruction"
This reverts commit 67ce04ea9a

Change-Id: I2781c9275c03bcabf0211e1b6cd1aa8f13005ae0
Reviewed-on: http://review.coreboot.org/2014
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-12-09 00:00:30 +01:00
Patrick Georgi 198d23c119 crossgcc: Normalize library directories
Various of the build scripts used upstream can't cope with
multilib library paths (eg. lib64), so move things to a place
where they can find them, if such paths are used.

Change-Id: I0dd9bba9a9eadd92d8704157e868fb37c715ee91
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/2013
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-12-08 08:26:06 +01:00
Marc Jones 5d01b765e3 coreinfo: Make better calls to libpayload build scripts
Set LPGCC and LPAS so that CC and AS are maintained.
Clean up the makefile order to check for .config to be easier to
read.
Use objcopy instead of strip and keep the debug symbols file.

Change-Id: I95d6b7a0e3a99a142d3fd6e2ecc61de1d4412402
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Reviewed-on: http://review.coreboot.org/1994
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-12-08 06:57:31 +01:00
Marc Jones bb9490a4b0 Clean up libpayload lpgcc and lpas scripts.
lpgcc and lpas are called by payload Makefiles to properly
build and link with libpayload.

Made lpas use the proper crosscompile AS, as lpgcc does with CC.
Added V=1 support to help users debug the build.
Fix basename $CC and $AS expansion.

Change-Id: Ia4dc8ba53ba7565521a79f1520155f3307b09f85
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Reviewed-on: http://review.coreboot.org/1993
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-12-08 06:56:34 +01:00
Stefan Reinauer da1ef02e90 stddef.h: move to generic code
stddef.h should be fairly generic across all platforms we'd want to
support, so let's move it to generic code.

Change-Id: I580c9c9b54f62fadd9ea97115933e16ea0b13ada
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-on: http://review.coreboot.org/2007
Tested-by: build bot (Jenkins)
2012-12-08 06:54:16 +01:00
Stefan Reinauer 52db0b9845 WIP: Initial ARMv7 architecture implementation in coreboot
The first ARMv7 CPU we're going to support is the Exynos 5250
used in the Google Snow ChromeBook.

Change-Id: I4de8433bbc6202eb8fef2556a11186a3376d411b
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-on: http://review.coreboot.org/2004
Tested-by: build bot (Jenkins)
2012-12-08 06:53:19 +01:00
Stefan Reinauer 509f77277c WIP: Add support for non-8250 built-in UARTs
Change-Id: I5b412678bb8993633b3a610315d298cb20c705f3
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/2011
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-12-08 06:51:59 +01:00
Stefan Reinauer bb626346ea cbfs_core.h: support for ARMv7 CBFS master header
Change-Id: I59626200b4a92d90b46625f8dcc2ed28e6376e46
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-on: http://review.coreboot.org/2008
Tested-by: build bot (Jenkins)
2012-12-08 06:50:02 +01:00
Stefan Reinauer 9fe20cb381 WIP: Initial support for Samsung Exynos 5250 ARM CPU
Samsung SoC files, including Exynos5 (a Cortex-A15
implementation). Since this is an SoC we'll forego the x86-style
{north,south}bridge and cpu distinction. We may try to split some
stuff out before the final version if prudent.

Change-Id: Ie068e9dc3dd836c83d90e282b10d5202e7a4ba9b
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-on: http://review.coreboot.org/2005
Tested-by: build bot (Jenkins)
2012-12-08 06:48:03 +01:00
Marc Jones 747127d505 Limit SPI device debug prints with CONFIG_DEBUG_SPI_FLASH
Fix debug printks which were not using CONFIG_DEBUG_SPI_FLASH,
which would cause long delays durring boot when SPI devices
were written.

Change-Id: I99fc3d5f847fdf4bb98e2a0342ea418ab7d5fc54
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Reviewed-on: http://review.coreboot.org/1965
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-12-08 06:47:28 +01:00
Stefan Reinauer 91f1423cac Fix Yabel compilation on non-x86 platforms
Mostly preventing inb/outb being used on non-x86

Change-Id: I0434df4ce477c262337672867dc6ce398ff95279
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/2002
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-12-08 06:46:14 +01:00
Stefan Reinauer 4c4dd93be7 Only include libgcc wrappers on x86
ARM does not need them, and they're causing trouble

Change-Id: I6c70a52c68fdcdbf211217d30c96e1c2877c7f90
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/2009
Tested-by: build bot (Jenkins)
2012-12-08 03:52:53 +01:00
Stefan Reinauer bca9b9d53e Makefile cosmetics
align architectures

Change-Id: Ie3fe29d830d45e76c183411c04598e82b4b3a010
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/2003
Tested-by: build bot (Jenkins)
Reviewed-by: David Hendricks <dhendrix@chromium.org>
2012-12-08 03:08:45 +01:00
Stefan Reinauer 2110c97a63 Allow PCI option rom execution only on systems with PCI support
... on all other systems it will fail terribly ;-)

Change-Id: I7f8d10b71b2dbc798b28aee7c36872685c793fd8
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/2001
Tested-by: build bot (Jenkins)
Reviewed-by: David Hendricks <dhendrix@chromium.org>
2012-12-08 02:10:13 +01:00
Stefan Reinauer 10099070ca abuild: Select correct cross compiler for ARMV7 architecture
Change-Id: Ia0dce25a4271299757654ba46baafe6a6673c6d2
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/2000
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Tested-by: build bot (Jenkins)
2012-12-08 01:22:17 +01:00
Stefan Reinauer 16bd789a73 buildgcc: Clean up PATH handling
This puts our installed binaries first in the search path, which is what we
really want.

... and remove some dead code
Signed-off-by: Stefan Reinauer <reinauer@google.com>

Change-Id: I91725af6b0fc486bd943d8e25cdce8d3e2503b3c
Reviewed-on: http://review.coreboot.org/1998
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Tested-by: build bot (Jenkins)
2012-12-08 00:45:09 +01:00
Stefan Reinauer a348d901c7 buildgcc: drop hack to build gcc trunk versions
The focus of the script is to create a supported cross toolchain,
and with GOLD and LTO being released features, we don't need this
anymore.

Change-Id: Ieb7752ce6e143d93414aba5887190f853cbd5a4b
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/1997
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Tested-by: build bot (Jenkins)
2012-12-08 00:45:03 +01:00
Patrick Georgi 969cd931f8 buildgcc: Remove mingw32 hacks
After patching them to be more flexible, an even better approach was found:
With this change libgcc isn't built at all on mingw32 platforms, so the
system headers aren't necessary anymore.

Now x86_64-pc-mingw32 builds, too.

Change-Id: Ic1406588669d87aee1bcf40ff67af77f2a6ac283
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/1985
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Raymond Danks <ray.danks@se-eng.com>
2012-12-07 23:44:47 +01:00
Stefan Reinauer 17b24d3fef abuild: produce valid junit files
If no valid cross compiler is found, the junit file produced
by abuild is invalid, missing the closing </testcase> tag.
This breaks proper reporting in Jenkins of our ARM board at
this moment.

Change-Id: I94bfc7f334d33ceeb53451a7c5125058c1f33bd4
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/1992
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Tested-by: build bot (Jenkins)
2012-12-07 22:33:16 +01:00
Dave Frodin 1b0c352675 coreinfo: change the foreground/background colors
The default curses library changed from tinycurses to
PDCurses. PDCurses fails to fill the entire active screen with
the assigned background colors when it writes 'blank' chars.
This will allow the menues to look better until I resolve that.

Change-Id: I70b5331d16dd0abaa1f0b02b725571844b7ac15e
Signed-off-by: Dave Frodin <dave.frodin@se-eng.com>
Reviewed-on: http://review.coreboot.org/1984
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Marc Jones <marcj303@gmail.com>
2012-12-07 20:43:13 +01:00
Dave Frodin cbf3d407b8 Add function to map vendor/device to generic VBIOS IDs
Change-Id: I4d7c4ec2b91c97eacf96770c150c2b9a61309053
Signed-off-by: Dave Frodin <dave.frodin@se-eng.com>
Reviewed-on: http://review.coreboot.org/1982
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-12-07 20:42:33 +01:00
Dave Frodin 0a90861ff2 libpayload: Don't let USB/PC/serial keyboards overwrite each other
Change-Id: I75c0066cf737e0cecac056487215622e2b3d4467
Signed-off-by: Dave Frodin <dave.frodin@se-eng.com>
Reviewed-on: http://review.coreboot.org/1981
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-12-07 20:41:46 +01:00
David Hendricks 67ce04ea9a armv7: use __cpu_to_le32 for endianness of reset vector instruction
Change-Id: Ic8f35d7172f6afa933c24774177ed65e6dc579a0
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: http://review.coreboot.org/1979
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-12-07 07:48:18 +01:00
Stefan Reinauer c2d5a1651e Disable CMOS_POST and IO_POST on non-PC80 systems
Because they use outb instructions, they are bound to fail
on non-PC80 systems like ARM.

Change-Id: I679ac6c0964c06c369cc90556529bb6f629d56f9
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/1974
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Tested-by: build bot (Jenkins)
2012-12-06 23:57:11 +01:00
Patrick Georgi fecd26f208 crossgcc: Generalize matching for the mingw case
With this change, i686-pc-mingw32 is acceptable, too.

Change-Id: I924f7ece84e77dc751e5e0318bac1ebc72d39d21
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/1972
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2012-12-06 23:18:55 +01:00
Stefan Reinauer 399486e8fb Unify assembler function handling
Instead of adding regparm(0) to each assembler function called
by coreboot, add an asmlinkage macro (like the Linux kernel does)
that can be different per architecture (and that is  empty on ARM
right now)

Change-Id: I7ad10c463f6c552f1201f77ae24ed354ac48e2d9
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/1973
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-12-06 23:13:17 +01:00
Zheng Bao c269a9b51c driver/spi: Add support of MX25L3235D
Tested on Thatcher.

Change-Id: I648171ba0d03be1e984c182f6d0f082241e3f51c
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Signed-off-by: zbao <fishbaozi@gmail.com>
Reviewed-on: http://review.coreboot.org/1971
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-12-06 06:17:52 +01:00
Stefan Reinauer cb0895470e Fix xcompile (again)
After cherry-picking change 1679 it became apparent that there was a small
typo in my last xcompile change. With this patch applied, I can now compile
the first few files in the tree before GCC dies with

In file included from src/arch/armv7/lib/romstage_console.c:23:0:
src/include/uart.h:31:6: error: redundant redeclaration of 'uart_init' [-Werror=redundant-decls]

Now for some fun...

Change-Id: Idbb07f609e4a240238964cc16714639f5ef09914
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/1970
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Tested-by: build bot (Jenkins)
2012-12-06 04:48:51 +01:00
Stefan Reinauer e42133f33e Fix xcompile for ARMv7 and our cross toolchain
The naming of architectures is highly inconsistent between
the different components of the toolchain. In binutils, the
file architecture is elf32-littlearch. In GCC it's armv7a-eabi.
This patch adds support for different BFD / GCC names

Change-Id: Ib644f71e8d8b4964adec73eed23921d3838e8aa7
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/1969
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Tested-by: build bot (Jenkins)
Reviewed-by: David Hendricks <dhendrix@chromium.org>
2012-12-06 02:35:07 +01:00
Stefan Reinauer 6edb729cee Drop ARCH_ARM in favor of ARCH_ARMV7
The ARM architecture is really many architectures, and most
of them need their own toolchain. After discussing with Ron
and David, we decided that we're going to call the architecture
of our ARM board armv7.. This patch cleans out the remainders
of ARCH_ARM in the tree and moves on to consistent ARMv7 naming.
As of now, we only support little endian ARMv7 CPUs. We can
fix that for big endian if/when it comes our way.

Change-Id: Id70c7ef615f600e4d09961d811e7ac974fce4811
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/1968
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-12-06 02:26:42 +01:00
Stefan Reinauer 4266b92db0 crossgcc: Fix buildgcc on Mac OS X
Once again, the compiler we use on Mac OS X had trouble compiling GCC.
Switch to llvm-gcc because that one works with Xcode 4.5.2 and gcc 4.7.2.
Also drop the -W flags not known to Xcode from the iasl Makefile, and
drop the --remove-destination option from the copy, because that does not
exist on Darwin.

Change-Id: I9f978f65b5ae7edee2ecdcab337772e7a692bd9b
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/1967
Tested-by: build bot (Jenkins)
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-12-06 02:01:42 +01:00
David Hendricks 0f5caa26cb Conditionally include mc146818rtc in console.c
get_option() is used to get a config option (debug loglevel) from
CMOS. However, not all machines have CMOS, so define a dummy inline
function that will return an error code so the caller (console_init())
will use the default loglevel.

Change-Id: I6adf371d79164178f40a83f7608289a6a7673357
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: http://review.coreboot.org/1962
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-12-05 05:26:31 +01:00
Stefan Reinauer dab4238d10 crossgcc: Add support for building armv7a toolchain
!#%$@ autotools don't support all the platforms gcc and binutils
support. If you try to update to the latest autoconf, it will complain
that you have to use the older one. If I had a penny for every time
autotools broke portability...

Change-Id: I479b6c5f64f1def8dca889884e6a2b0e2ffc1fb8
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/1966
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Tested-by: build bot (Jenkins)
2012-12-05 01:54:13 +01:00
Kyösti Mälkki 9b92665141 Drop TINY_BOOTBLOCK
Change-Id: I38ea2ed2be4d9240ec8cb6d5dc5b3cc578cdaefb
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/1963
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2012-12-01 22:50:43 +01:00
Ronald G. Minnich efb7940867 Add include files for samsung s5p-common
These are from u-boot but have been cleaned up somewhat to remove
references to linux include files.

Change-Id: I5fe3954a11d8c4aa792620ef5e1a5ee8932b8578
Signed-off-by: Hung-Ti Lin <hungte@chromium.org>
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-on: http://review.coreboot.org/1930
Tested-by: build bot (Jenkins)
2012-12-01 02:13:15 +01:00
Stefan Reinauer 8d7115560d Rename devices -> device
to match src/include/device

Change-Id: I5d0e5b4361c34881a3b81347aac48738cb5b9af0
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/1960
Tested-by: build bot (Jenkins)
Reviewed-by: David Hendricks <dhendrix@chromium.org>
2012-11-30 23:59:58 +01:00
David Hendricks 4b6be985aa Change TARGET_I386 to ARCH_X86
This renames TARGET_I386 to ARCH_X86 to make it more uniform with
other parts of the codebase, e.g. cbfs_core.h from cbfstool.

Change-Id: I1babcc941245ed1dde0478a21828766759373a42
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: http://review.coreboot.org/1961
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Dave Frodin <dave.frodin@se-eng.com>
2012-11-30 23:20:54 +01:00
David Hendricks 0a92f89f5d fix #if for target architecture in libpayload
This bug was introduced when we copied cbfs_core.h from cbfsutil
to libpayload.

Change-Id: I9b5d00d0dbdb969644ce46ad6ac2a84b366b5cd7
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: http://review.coreboot.org/1958
Reviewed-by: Dave Frodin <dave.frodin@se-eng.com>
Tested-by: build bot (Jenkins)
2012-11-30 22:50:53 +01:00
Stefan Reinauer 1e753294c4 Drop boot directory
It only has two files, move them to src/lib

Change-Id: I17943db4c455aa3a934db1cf56e56e89c009679f
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/1959
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Tested-by: build bot (Jenkins)
2012-11-30 21:56:33 +01:00
Stefan Reinauer 179206a1ac src/lib/Makefile.inc: Add license header
Change-Id: If8bce4ebde9101ac9087fcbd43adc0e08c26352d
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/1957
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-11-30 21:34:38 +01:00
Stefan Reinauer 859e808709 Make set_boot_successful depend on PC80_SYSTEM
Set_boot_successful depends on CMOS parts that non-PC80
platforms do not have. For now, make the current path
depend on CONFIG_PC80_SYSTEM, and make the alternative
empty.

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Change-Id: I68cf63367c8054d09a7a22303e7c04fb35ad0153
Reviewed-on: http://review.coreboot.org/1954
Tested-by: build bot (Jenkins)
Reviewed-by: David Hendricks <dhendrix@chromium.org>
2012-11-30 21:33:35 +01:00
Stefan Reinauer 3d6eb29099 Only compile PC80 drivers when CONFIG_PC80_SYSTEM is set
Change-Id: Iac2f3ebf68c9c1df296fc81d10ee97053a9d5469
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/1956
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-11-30 21:33:18 +01:00
Stefan Reinauer 0a9775941d cbfstool: Clean up messages
The output of cbfstool is a little inconsistent in some places.
This patch fixes it.

Change-Id: Ieb643cb769ebfa2a307bd286ae2c46f75ac5e1c1
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/1955
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-11-30 21:32:02 +01:00
Patrick Georgi 7f934f5ee0 build system: Treat cmos.default as text file
It's a more easily maintainable format than a 128 byte binary blob

Change-Id: Ic9b9f53cd025b5f89a21971930fabf6592f95d67
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Reviewed-on: http://review.coreboot.org/1867
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2012-11-30 21:24:57 +01:00
Siyuan Wang 8ff97b2973 Supermicro h8scm: add agesa version of supermicro
Supermicro h8scm has a C32 CPU socket, the details of this board is:
http://www.supermicro.com/Aplus/motherboard/Opteron4100/SR56x0/H8SCM-F.cfm
We are planning to replace legacy C32 code with agesa and the h8scm_fam10 do not support
family 15 CPU, so we update this mainboard with this patch.

This code supports memory at 800M Hz of f10 CPU, bu f15 CPU does not has this limitation.
If you want to change the frequency of memory, please edit the macros
"BLDCFG_MEMORY_BUS_FREQUENCY_LIMIT" and "BLDCFG_MEMORY_CLOCK_SELECT"
in src/mainboard/supermicro/h8scm/buildOpts.c

Change-Id: I9ca9e70d7f3e82c07e7d36695bf31008db152afb
Signed-off-by: Siyuan Wang <SiYuan.Wang@amd.com>
Signed-off-by: Siyuan Wang <wangsiyuanbuaa@gmail.com>
Reviewed-on: http://review.coreboot.org/1510
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marcj303@gmail.com>
2012-11-30 20:11:54 +01:00
Zheng Bao e7d6f02ca4 AMD SB800: Interrupt routine for PCI slots on Persimmon
Set the correct device number in the pcie interrupt routine in ACPI asl.
The device number is decided by which address pin is connected to IDSEL.
Table 3-1: IDSEL Generation
Primary Address AD[15::11] Secondary Address AD[31::16]
0 0000 0000 0000 0000 0001
0 0001 0000 0000 0000 0010
0 0010 0000 0000 0000 0100
0 0011 0000 0000 0000 1000
0 0100 0000 0000 0001 0000
0 0101 0000 0000 0010 0000
0 0110 0000 0000 0100 0000
0 0111 0000 0000 1000 0000
0 1000 0000 0001 0000 0000
0 1001 0000 0010 0000 0000
0 1010 0000 0100 0000 0000
0 1011 0000 1000 0000 0000
0 1100 0001 0000 0000 0000
0 1101 0010 0000 0000 0000
0 1110 0100 0000 0000 0000
0 1111 1000 0000 0000 0000
1 xxxx 0000 0000 0000 0000
On persimmon, PCI slot 0's IDSEL is connected to AD19, so the device number is 3.
Slot 1's IDSEL is connected to AD20, so the device number is 4.

Change-Id: Ic0fb7ac1c87ec306bf314e4d2b8c2bdc9031081b
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Signed-off-by: zbao <fishbaozi@gmail.com>
Reviewed-on: http://review.coreboot.org/1610
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martin@se-eng.com>
Reviewed-by: Marc Jones <marcj303@gmail.com>
2012-11-30 20:05:59 +01:00
Dave Frodin fbb5b4035f Persimmon: Disable the unused PCI clocks
Change-Id: I4b735fe4e6441f99236e43b34695fdac95b8888a
Signed-off-by: Dave Frodin <dave.frodin@se-eng.com>
Reviewed-on: http://review.coreboot.org/1875
Tested-by: build bot (Jenkins)
Reviewed-by: Zheng Bao <zheng.bao@amd.com>
Reviewed-by: Marc Jones <marcj303@gmail.com>
2012-11-30 20:04:24 +01:00