Commit graph

4 commits

Author SHA1 Message Date
Martin Roth
4c72d3612b Remove extra newlines from the end of all coreboot files.
This removes the newlines from all files found by the new
int-015-final-newlines script.

Change-Id: I65b6d5b403fe3fa30b7ac11958cc0f9880704ed7
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/15975
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-07-31 18:19:33 +02:00
Martin Roth
ebabfadcec soc/intel: Update license headers
Update all of the license headers to make sure they are compliant
with coreboot's license header policy.

Change-Id: I151d058615290e528d9d1738c17804f6b9cc8dce
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/14321
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-04-14 16:54:33 +02:00
Lee Leahy
1d14b3e926 soc/intel: Add Skylake SOC support
Add the files to support the Skylake SOC.
Matches chromium tree at 927026db

BRANCH=none
BUG=None
TEST=Build and run on a Skylake platform

Change-Id: I80248f7e47eaf13b52e3c7ff951eb1976edbaa15
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: http://review.coreboot.org/10341
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2015-07-16 17:24:48 +02:00
Lee Leahy
b000513741 soc/intel/skylake: Use Broadwell as comparision base for Skylake SOC
Use the Broadwell implementation as the comparison base for Skylake.

BRANCH=none
BUG=None
TEST=None

Change-Id: I22eb55ea89eb0d6883f98e4c72a6d243e819e6d8
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: http://review.coreboot.org/10340
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-07-16 17:23:27 +02:00