3 (with one of them way too much assembler code).
On the way, I had to make some changes to the way the code is built,
which is an effort I want to expand over time.
Right now, large portions of the in-ROM part of coreboot is compiled as
a single file, with lots of .c files including other .c files.
That has its justification for pre-raminit code, but it also affects
lots of post-raminit code (memcpy doesn't really make sense before
raminit, or at least CAR)
The coreboot_apc code (AMD boards) gained some .c includes because I
don't know that part of the code enough to really rework it and only
have limited possibilities to test it. The includes should give an
identical situation for this part of the code.
This change was posted as set of 6 patches to the list, but they
were mostly split for review purposes, hence commit them all at once.
They can still be backed up using the patch files, if necessary.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4233 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
(scan-build chokes on this)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4181 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This also has the config tool changes in v2/util.
Rename romfs.[ch]->cbfs.[ch] and sed romfs->cbfs romtool->cbfstool ROMFS->CBFS
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4113 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
now all have the same parameter order.
action "$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS)
-I$(TOP)/src -I. -nostdinc -nostdlib -fno-builtin -Wall -Os -c -S
$(MAINBOARD)/$(CACHE_AS_RAM_AUTO_C) -o $@"
The idea behind this parameter order is:
- *FLAGS at the beginning.
- Use a common set of *FLAGS.
- Include files and directories listed afterwards.
- nostdinc, nostdlib, no-builtin tell the compiler this is standalone
code.
- Warnings. They do not influence source or compilation.
- Compilation strategy (small) and output mode (asm or binary).
- File to be compiled.
- Output name.
- $(DEBUG_CFLAGS) and -S are only used for asm output.
Other changes in this patch:
- src/supermicro/h8dme/Config.lb now uses $DEBUG_CFLAGS instead of
hardcoding the respective flags.
- $DEBUG_CFLAGS was added to asm outputting $CC calls:
supermicro/h8dme/Config.lb
lippert/roadrunner-lx/Config.lb
- $DISTRO_CFLAGS was added to some $CC calls in:
iwill/dk8_htx/Config.lb (CAR AP code)
supermicro/h8dmr/Config.lb (CAR AP code)
supermicro/h8dme/Config.lb (CAR AP code)
gigabyte/m57sli/Config.lb (CAR AP code)
gigabyte/ga_2761gxdk/Config.lb (CAR AP code)
amd/serengeti_cheetah_fam10/Config.lb (everywhere)
msi/ms7135/Config.lb (everywhere)
nvidia/l1_2pvv/Config.lb (CAR AP code)
-$CFLAGS was added to all $CC calls in:
amd/db800/Config.lb
amd/dbm690t/Config.lb
amd/norwich/Config.lb
amd/pistachio/Config.lb
amd/serengeti_cheetah/Config.lb
amd/serengeti_cheetah_fam10/Config.lb
arima/hdama/Config.lb
artecgroup/dbe61/Config.lb
asus/a8n_e/Config.lb
asus/a8v-e_se/Config.lb
asus/m2v-mx_se/Config.lb
broadcom/blast/Config.lb
digitallogic/msm800sev/Config.lb
gigabyte/ga_2761gxdk/Config.lb
gigabyte/m57sli/Config.lb
ibm/e325/Config.lb
ibm/e326/Config.lb
iei/pcisa-lx-800-r10/Config.lb
iwill/dk8_htx/Config.lb
iwill/dk8s2/Config.lb
iwill/dk8x/Config.lb
kontron/986lcd-m/Config.lb
lippert/roadrunner-lx/Config.lb
lippert/spacerunner-lx/Config.lb
msi/ms7135/Config.lb
msi/ms7260/Config.lb
msi/ms9185/Config.lb
msi/ms9282/Config.lb
newisys/khepri/Config.lb
nvidia/l1_2pvv/Config.lb
pcengines/alix1c/Config.lb
sunw/ultra40/Config.lb
supermicro/h8dme/Config.lb
supermicro/h8dmr/Config.lb
technexion/tim8690/Config.lb
tyan/s2735/Config.lb
tyan/s2850/Config.lb
tyan/s2875/Config.lb
tyan/s2880/Config.lb
tyan/s2881/Config.lb
tyan/s2882/Config.lb
tyan/s2885/Config.lb
tyan/s2891/Config.lb
tyan/s2892/Config.lb
tyan/s2895/Config.lb
tyan/s2912/Config.lb
tyan/s2912_fam10/Config.lb
tyan/s4880/Config.lb
tyan/s4882/Config.lb
- Use $@ wherever appropriate.
- Kill that evil CACHE_AS_RAM_AUTO_C variable.
- Trailing whitespace fixups on lines which were touched anyway.
We now only have 6 remaining different calls to $CC whereas before there
were 20.
If I am allowed to rename src/mainboard/kontron/986lcd-m/auto.c to
src/mainboard/kontron/986lcd-m/cache_as_ram_auto.c, we're down to 4
different calls.
If we can decide on the use of $CPU_OPT, we are down to 3 different
calls.
One additional point I'd like to clear up:
if ASSEMBLER_DEBUG
makedefine DEBUG_CFLAGS := -g -dA -fverbose-asm
end
"-dA -fverbose-asm" is only useful for asm output. For these flags,
DEBUG_CFLAGS is a total misnomer. What about calling them
DEBUG_ASMCFLAGS or somesuch?
"-g" should be controllable by a separate switch. It is useful even for
object code.
The following targets are broken by this patch because they contain
implicit declarations, but the error did not trigger due to missing
CFLAGS:
amd/serengeti_cheetah
asus/a8v-e_se
asus/m2v-mx_se
digitallogic/msm800sev
pcengines/alix1c
supermicro/h8dme
supermicro/h8dmr
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4097 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4058 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
in their Config.lb but never use it. There's no point in keeping
dead code around.
This patch removes ROMCC remainders from Config.lb and kills orphaned
auto.c and failover.c in the affected mainboard directories.
arima/hdama
ibm/e325
ibm/e326
iwill/dk8s2
iwill/dk8x
msi/ms9282
newisys/khepri
sunw/ultra40
tyan/s2891
tyan/s2892
tyan/s2895
tyan/s4880
tyan/s4882
Abuild log is completely identical with and without the patch.
With this patch, the last ROMCC remainders for K8 boards are gone.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4055 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Tested under abuild, causes no trouble.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4035 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
a long time ago. This will make it easier to port v2 boards forward to v3 at
some point (and other things)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3964 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This patch converts mainboard_$VENDOR_$BOARD_ops to mainboard_ops and
mainboard_$VENDOR_$BOARD_config to mainboard_config.
Ron's part:
The config change that makes the naming change not break every build.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3954 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
cause problems with certain toolchains. This patch will also safe some hard
disk space for those of us working on laptops or netbooks with always too small
disks.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3876 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
debug code to src/northbridge/amd/amdk8/incoherent_ht.c.
However, printk is not available for all boards at that stage.
I have changed the following boards:
agami/aruma
arima/hdama
asus/a8n_e
broadcom/blast
ibm/e325
ibm/e326
iwill/dk8s2
iwill/dk8x
msi/ms7135
newisys/khepri
sunw/ultra40
tyan/s2850
tyan/s2875
tyan/s2880
tyan/s2881
tyan/s2882
tyan/s2885
tyan/s2891
tyan/s2892
tyan/s2895
tyan/s4880
tyan/s4882
abuild works fine for all of them.
agami/aruma needs a Config-abuild.lb which doesn't have fallback and
normal due to size problems.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Marc Jones <marcj303@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3829 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
With this patch it's possible to
- determine the according source code line for each asm statement
(objdump -dS)
- determine the source code file for each asm statement
(objdump -ddl)
This isn't exactly trivial because cache_as_ram_auto.c gets compiled to
assembly and converted by a perl script afterwards.
This patch solves the problem
- by extending cache_as_ram_auto.inc with debug information and line
numbers
- by correcting the perl calls (".text" --> "\.text")
- by creating a disassembly with source code and line numbers.
(ctr0.disasm and
coreboot.disasm)
There's one minor downside to the patch: A complete abuild run takes up
around 1.6G instead of about 700MB now. But I'm sure this is quite
reasonable for the benefits.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Please commit while this is being worked out.
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3778 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This is abuild-tested by me.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3654 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
code to use it. That makes the code more readable and also less
error-prone.
Abuild tested.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3624 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
targets/*/*/Makefile
targets/*/*/normal/Makefile
targets/*/*/fallback/Makefile
to use a common copy of romcc, and to leave this compiler untouched by
'make clean' in targets/*/*/fallback/ and targets/*/*/normal/ .
'make clean' in targets/*/*/ will clean romcc.
Thanks to Mats for the initial idea and implementation of a tool to do
this. This patch has almost the same behaviour as the original tool
without having to run the tool each time.
Tested for abuild-friendliness.
The patch saves ~10-12 seconds for every target using romcc. For a full
abuild run, this is ~20% time saved.
For the first 38 abuild targets, total build time is down to 13m24s
instead of 16m22s on my machine.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Mats Erik Andersson <mats.andersson@gisladisker.se>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3564 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
included on the CC line for cache_as_ram_auto.c
Tested on ubuntu, where formerly it failed.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Corey Osgood <corey.osgood@gmail.com>
Acked-by: Ward Vandewege <ward@gnu.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3079 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Due to the automatic nature of this update, I am self-acking. It worked in
abuild.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3053 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Options.lb file that already had a "uses CONFIG_COMPRESSED_PAYLOAD_LZMA"
line in it.
I figure that only adding it to the files that already have support
for LZMA payloads makes sure I don't break anything.
Signed-off-by: Myles Watson <myles@pel.cs.byu.edu>
Acked-by: Ward Vandewege <ward@gnu.org>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3002 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
and leaving enough room for a real payload (not /dev/null)
This is a wonderful example why "uses" sucks.
* add Config-abuild.lb for those boards that dont build with
the default settings and a real payload:
arima/hdama, amd/quartet, amd/serengeti_cheetah, ibm/e326
* if lzma is installed and a real payload is used, try compressing
it.
* fix a small bug in "abuild --help"
This patch is acked by me because its due to infrastructural changes only.
Flames welcome.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2496 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
same format for all CHIP_NAME() entries in LinuxBIOS (Closes#20).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@linuxbios.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2490 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
and (hopefully) the correct canonical name of the vendor and board.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2476 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
will then rename the src/superio/NSC directory to src/superio/nsc.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2472 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
- Special version for HDAMA rev G with 33Mhz test and reboot out.
- Support for CPU rev E, dual core, memory hoisting,
- corrected an SST flashing problem. Kernel bug work around (NUMA)
- added a Kernel bug work around for assigning CPU's to memory.
r2@gog: svnadmin | 2005-08-03 08:47:54 -0600
Create local LNXI branch
r1110@gog: jschildt | 2005-08-09 10:35:51 -0600
- Merge from Tom Zimmerman's additions to the hdama code for dual core
and 33Mhz fix.
r1111@gog: jschildt | 2005-08-09 11:07:11 -0600
Stable Release tag for HDAMA-1.1.8.10 and HDAMA-1.1.8.10LANL
r1112@gog: jschildt | 2005-08-09 15:09:32 -0600
- temporarily removing hdama tag to update to public repository. Will
reset tag after update.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2004 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
1. x86_setup_mtrr take address bit.
2. generic ht, pcix, pcie beidge...
3. scan bus and reset_bus
4. ht read ctrl to decide if the ht chain
is ready
5. Intel e7520 and e7525 support
6. new ich5r support
7. intel sb 6300 support.
yhlu patch
1. split x86_setup_mtrrs to fixed and var
2. if (resource->flags & IORESOURCE_FIXED ) return; in device.c pick_largest_resource
3. in_conherent.c K8_SCAN_PCI_BUS
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1982 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Creator: Yinghai Lu <yhlu@tyan.com>
write_pirq_routing_table for x86
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1979 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Creator: Yinghai Lu <yhlu@tyan.com>
cache_as_ram for AMD and some intel
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1967 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Creator: Li-Ta Lo <ollie@lanl.gov>
Onboard VGA for HDAMA
Added onboard VGA support for Arima/HDAMA
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1957 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Creator: Li-Ta Lo <ollie@lanl.gov>
emulator update
x96emu update from Paulo
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1954 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Creator: Li-Ta Lo <ollie@lanl.gov>
emulator update
Correction to the reduce emulator from Paulo
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1952 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Creator: Yinghai Lu <yhlu@tyan.com>
AMD D0/E0 Opteron new mem mapping support, AMD E Opteron mem hole support,AMD K8 Four Ranks DIMM support
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1950 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
crt0.S.lb: Modified so that it is safe to include console.inc
console.c: Added print_debug_ and frieds which are non inline variants of the normal console functions
div64.h: Only include limits.h if ULONG_MAX is not defined and define ULONG_MAX on ppc
socket_754/Config.lb Conditionally set config chip.h
socket_940.c We don't need and #if CONFIG_CHIP_NAME we won't be linked in if there are no references.
slot_2/chip.h: The operations struct need to be spelled cpu_intelt_slot_2_ops
slot_2/slot2.c: The same spelling fix
socket_mPGA603/chip.h: again
socket_mPGA603/socket_mPGA603_400Mhz.c: and again
socket_mPGA604_533Mhz/Config.lb: Conditionally defing CONFIG_CHIP_NAME
socket_mPGA604_800Mhz/chip.h: Another spelling fix
socket_mPGA604_800Mhz.c and again
via/model_centaur/model_centaur_init.c: It's not an intel CPU so don't worry about Intel microcode uptdates
earlymtrr.c: Remove work around for older versions of romcc
pci_ids.h: More ids.
malloc.c: We don't need string.h any longer
uart8250.c: Be consistent when delcaring functions static inline
arima/hdama/mptable.c: Cleanup to be a little more consistent
amdk8/coherent_ht.c:
- Talk about nodes not cpus (In preparation for dual cores)
- Remove clear_temp_row (as it is no longer needed)
- Demoted the failure messages to spew.
- Modified to gracefully handle failure (It should work now if cpus are removed)
- Handle the non-SMP case in verify_mp_capabilities
- Add clear_dead_routes which replaces clear_temp_row and does more
- Reorganize setup_coherent_ht_domain to cleanly handle failure.
- incoherent_ht.c: Clean up the indenation a little.
i8259.c: remove blank lines at the start of the file.
keyboard.c: Make pc_keyboard_init static
ramtest.c: Add a print out limiter, and cleanup the printout a little.
amd8111/Config.lb: Mention amd8111_smbus.c
amd8111_usb.c: Call the structure usb_ops not smbus_ops.
NSC/pc97307/chip.h: Fix spelling issue
pc97307/superio.c: Use &ops no &pnp_ops.
w83627hf/suerio.c: ditto
w83627thf/suerio.c: ditto
buildrom.c: Use braces around the body of a for loop. It's more maintainable.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1778 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
