Commit Graph

1909 Commits

Author SHA1 Message Date
Paul Menzel 1cc77e0f89 util/board_status/board_status.sh: Move comment to right position
Fix up commit 1b6e7a67 (Updates to the board status script) adding this
comment before running `cbfstool` by moving it to a more appropriate place.

Change-Id: Iff79ed44e8e5ced55f2345407d1668858098ebe4
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: http://review.coreboot.org/8491
Tested-by: build bot (Jenkins)
Reviewed-by: David Hendricks <dhendrix@chromium.org>
2015-02-20 20:45:41 +01:00
Patrick Georgi f3d8b9a663 xcompile: specify arm64 subarches
This tells abuild that it can in fact build arm64
images.

Change-Id: I47695372053513ca039e118776aa904ea0afa21d
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: http://review.coreboot.org/8474
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>
2015-02-17 18:11:18 +01:00
Marc Jones e77e37b957 cbootimage: Add HOSTCC and flags
Add the flags used by the Nvidia makefile and use HOSTCC
to build cbootimage. Note that adding -g makes the BCT
very large, so leave that flag out.

Change-Id: I4431efffdfdcbd030665b26f5b799352e38d1f95
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Reviewed-on: http://review.coreboot.org/8411
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-02-15 09:21:02 +01:00
Werner Zeh f129756ac9 lint: exclude *.hex files from whitespace checking
If one needs raw binary files, .bin extension cannot
be used due to settings in .gitignore. This patch
allows to use .hex files. To avoid lint checks on these
files, exclude the .hex extension from the test.

Change-Id: I4b503229d63694c48cce12ca8cd33ea58172af01
Signed-off-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-on: http://review.coreboot.org/8403
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-02-12 11:23:30 +01:00
Patrick Georgi 11b6ab6492 lint: exclude nvidia submodule from file list
From git's point of view submodules are a weird third thing between file
and directory. Avoid trying to apply file handling on a directory.

Change-Id: Ibbc9c28e1657d96413c5fb08705d30e25171254d
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/8372
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Tested-by: build bot (Jenkins)
2015-02-12 11:22:59 +01:00
Stefan Reinauer 44d0fd9841 Add Linux kernel's checkpatch.pl script
Carefully staging to enable checkpatch for coreboot contributions.

The biggest offender of the rules enforced by checkpatch I have found so
far is ... Oh, you guessed it? It's checkpatch itself.

Change-Id: Iaacbcd52c3bc22b083a24127a3ea17a7cc706245
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/8417
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-02-11 19:53:53 +01:00
Alexander Couzens c768f9231b utils/msrtool: add westmere cpuids to nehalem
Westmere's are nehalem's in 32nm

Change-Id: I529194d50dbe3f585faee14961542433ea96ab75
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
Reviewed-on: http://review.coreboot.org/8293
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Peter Stuge <peter@stuge.se>
2015-02-11 02:51:16 +01:00
Alexander Couzens ba0e895659 ectool: remove extra printf("Not dumping EC IDX RAM.")
It doesn't provide any useful information.

Change-Id: I13e68d443bbcadea45b8fbcc262ceb9deb3e2e61
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
Reviewed-on: http://review.coreboot.org/8380
Tested-by: build bot (Jenkins)
Reviewed-by: Nicolas Reinecke <nr@das-labor.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Peter Stuge <peter@stuge.se>
2015-02-11 02:36:40 +01:00
Alexander Couzens a5410dc450 ectool: add write support
Use `ectool -w <addr> -z <data>` to write into ec ram

Change-Id: Id4aca045f6b7c2343be96ea474ee74033897b8b7
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
Reviewed-on: http://review.coreboot.org/8323
Tested-by: build bot (Jenkins)
Reviewed-by: Nicolas Reinecke <nr@das-labor.org>
Reviewed-by: Peter Stuge <peter@stuge.se>
2015-02-11 02:35:32 +01:00
Marc Jones c4dbdaf50a xcompile: Rename aarch64 to arm64
coreboot toolchain.inc uses the ARCH_SUPPORTED variable set
by xcompile. This change allows for consistent naming in the
toolchain.inc generated variables.

Change-Id: Iafed06cf2d19a533f99e10b76aca82adc3e09fa8
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Reviewed-on: http://review.coreboot.org/8235
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
2015-01-26 11:40:37 +01:00
Julius Werner 337de4c0e5 cbmem: Add support for new 'coreboot' compatible device tree binding
This patch brings the cbmem utility in line with the recent change to
coreboot's device tree binding. Since trying to find the right node to
place this binding has been so hard (and still isn't quite agreed upon),
and because it's really the more correct thing to do, this code searches
through the device tree for the 'coreboot' compatible property instead
of looking up a hardcoded path. It also provides bullet-proof
'#address-cells' handling that should work for any endianness and size.

BUG=chrome-os-partner:29311
TEST=Ran cbmem -c and cbmem -t on Nyan_Big. Also straced the to make
sure everything looks as expected. 'time cbmem -t' = ~35ms shows that
there is no serious performance problem from the more thorough lookup
code.

Original-Change-Id: I806a21270ba6cec6e81232075749016eaf18508b
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/204274
Original-Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
(cherry picked from commit 3e64e28f684e60e8b300906c1abffee75ec6a5c2)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>

Change-Id: I0a0a4f69330d3d8c5c3ea92b55f5dde4d43fca65
Reviewed-on: http://review.coreboot.org/8141
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-01-13 21:31:50 +01:00
Furquan Shaikh 01f5396bdc cbfstool: Remove arch check for different stages
Remove the arch check for each stage as the arch for different stages can be
different based on the SoC. e.g.: Rush has arm32-based romstage whereas
arm64-based ramstage

BUG=None
BRANCH=None
TEST=Compiles successfully for nyan, link and rush

Original-Change-Id: I561dab5a5d87c6b93b8d667857d5e181ff72e35d
Original-Signed-off-by: Furquan Shaikh <furquan@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/205761
Original-Tested-by: Furquan Shaikh <furquan@chromium.org>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Commit-Queue: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-by: Ronald Minnich <rminnich@chromium.org>
(cherry picked from commit 6a6a87b65fcab5a7e8163258c7e8d704fa8d97c3)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>

Change-Id: Ic412d60d8a72dac4f9807cae5d8c89499a157f96
Reviewed-on: http://review.coreboot.org/8179
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-01-13 21:29:38 +01:00
Furquan Shaikh b26fd99087 cbfstool: Fix help display message
For arm64, the machine type is arm64 in cbfstool, however it was displayed as
aarch64 in help message. This patch corrects it.

BUG=None
BRANCH=None
TEST=None

Original-Change-Id: I0319907d6c9d136707ed35d6e9686ba67da7dfb2
Original-Signed-off-by: Furquan Shaikh <furquan@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/204379
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Tested-by: Furquan Shaikh <furquan@chromium.org>
(cherry picked from commit 1f5f4c853efac5d842147ca0373cf9b5dd9f0ad0)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>

Change-Id: I00f51f1d4a9e336367f0619910fd8eb965b69bab
Reviewed-on: http://review.coreboot.org/8144
Tested-by: build bot (Jenkins)
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2015-01-09 07:49:53 +01:00
Alexander Couzens aa3dd5d5db inteltool: add `-s` to dump spi bar and bios_cntl registers
Change-Id: I3bb5dc23885af8c992456ee5e4bd374cd4b813bf
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
Reviewed-on: http://review.coreboot.org/8049
Reviewed-by: Philipp Deppenwiese <zaolin@das-labor.org>
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-01-08 17:49:58 +01:00
Hung-Te Lin 0780d67ffe util/cbfstool: Fix byte-ordering for payload type field.
In https://chromium-review.googlesource.com/181272 the payload->type has been
changed to big-endian (network ordering) but the cbfs_image is still parsing
type as host ordering, which caused printing cbfs image verbosely
(cbfstool imge print -v) to fail to find entry field and print numerous
garbage output.

Payload fields should be always parsed in big-endian (network ordering).

BUG=none
TEST=make; cbfstool image.bin print -v -v -v # see payloads correctly

Original-Change-Id: If1ac355b8847fb54988069f694bd2f317ce49a1a
Original-Signed-off-by: Hung-Te Lin <hungte@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/200158
Original-Reviewed-by: Ronald Minnich <rminnich@chromium.org>
(cherry picked from commit 423f7dd28f8b071692d57401e144232d5ee2e479)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>

Change-Id: I5a4694e887c7ff48d8d0713bb5808c29256141a9
Reviewed-on: http://review.coreboot.org/8005
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Tested-by: build bot (Jenkins)
2015-01-03 17:33:13 +01:00
Vadim Bendebury 8b143c5c8b cbmem: use a single id to name mapping table
CBMEM IDs are converted to symbolic names by both target and host
code. Keep the conversion table in one place to avoid getting out of
sync.

BUG=none
TEST=manual
  . the new firmware still displays proper CBMEM table entry descriptions:

    coreboot table: 276 bytes.
    CBMEM ROOT  0. 5ffff000 00001000
    COREBOOT    1. 5fffd000 00002000

  . running make in util/cbmem still succeeds

Original-Change-Id: I0bd9d288f9e6432b531cea2ae011a6935a228c7a
Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/199791
Original-Reviewed-by: Stefan Reinauer <reinauer@chromium.org>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
(cherry picked from commit 5217446a536bb1ba874e162c6e2e16643caa592a)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>

Change-Id: I0d839316e9697bd3afa0b60490a840d39902dfb3
Reviewed-on: http://review.coreboot.org/7938
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2014-12-30 19:17:47 +01:00
Patrick Georgi 1dda372582 abuild: silence make
make called within make prints 'Entering directory'
cruft which confuses the architecture support test.
Silence it.

Change-Id: I7ce7e0ff49e9317fe736ed80f5f18186d416ae63
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/7968
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
2014-12-29 18:44:07 +01:00
Kyösti Mälkki f9b8ed86dd cbfstool: Fix update-fit command
Regression in commit 3fcde22 caused parse_microcode_blob() to access
data outside cpu_microcode_blob.bin file in CBFS and create invalid
Intel Firmware Interface Table entries.

Change-Id: I1a687060084c2acd6cac5f5053b74a332b4ac714
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/7958
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2014-12-28 19:58:35 +01:00
Alexandru Gagniuc 6c90f3334e util: Remove 'getpir' and 'mptable' tools
They create output in an obsolete form, are not actively maintained,
and the quality of the output is not better than randomly copy
pasting from other boards. These tools are no longer of any practical
value. remove them.

Change-Id: I49d7c5c86b908e08a3d79a06f5cb5b28cea1c806
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/5158
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2014-12-19 21:15:18 +01:00
Felix Held 5eabe25a69 util/superiotool: change displayed name of chip id 0xc333 (nct6776)
nct6776f and nct6776d are just two package variants containing the same die

Change-Id: I4d319fa0e791e66ad04857dede2fdfc8e42dd45a
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: http://review.coreboot.org/7806
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Tested-by: build bot (Jenkins)
2014-12-19 19:01:47 +01:00
Felix Held 4a699d12c5 util/superiotool: fix default values for nct6776 (rev. c)
change default values according to the datasheet in revision 1.2

Change-Id: Iec1d55dd7b906a7a41940f3f8e42413922883efd
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: http://review.coreboot.org/7805
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Tested-by: build bot (Jenkins)
2014-12-19 19:01:27 +01:00
Scott Duplichan f2c9837e6f ifdtool: Add O_BINARY to open flags for Windows compatibility
Windows requires O_BINARY when opening a binary file. Otherwise
\n characters get expanded to \r\n and <ctrl>z is treated as
end of file. For compatibility with non-Windows hosts, the patch
defines O_BINARY if it is not already defined.

Change-Id: I04cd609b644b1edbe9104153b43b9996811ffd38
Signed-off-by: Scott Duplichan <scott@notabs.org>
Reviewed-on: http://review.coreboot.org/7789
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-12-19 18:55:48 +01:00
Scott Duplichan e1a4dc803a arm_boot_tools: Add 'b' to fopen flags for Windows compatibility
Windows requires the 'b' (binary) flag when using fopen to open a
binary file. Otherwise \n characters get expanded to \r\n and <ctrl>z
is treated as end of file.

Change-Id: I3b85e4f9a8f7749801a39154881fe2eedd33f9b8
Signed-off-by: Scott Duplichan <scott@notabs.org>
Reviewed-on: http://review.coreboot.org/7790
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-12-19 18:55:34 +01:00
Patrick Georgi efb2a8f7f3 nvidia/cbootimage: update to latest upstream
Scott Duplichan provided a win32 related fix that
we want to use.

Change-Id: I791b470f9f6c5bf140fc190d290741f35f05d254
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: http://review.coreboot.org/7827
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-12-18 02:21:38 +01:00
Martin Roth 51dde6fe3b inteltool: Start adding Bay Trail
- Add silvermont (Bay Trail core) MSRs - these are shared with
rangeley/avoton.
- Add GPIO values and GPIO muxing information.
- Add Bay Trail to the PM list.

Still to do:
- Northbridge functionality (RCBA, Memory timings, etc.)
- Add Graphics registers

Change-Id: I9fe0c0f1efe5f4344aeb3bad3f13037555109060
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-on: http://review.coreboot.org/7711
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2014-12-16 00:42:13 +01:00
Scott Duplichan 4270a9777c buildgcc: Fix msys2 crossgcc build fail
A leading double slash can result when $DESTDIR/$TARGETDIR is expanded
in the libelf portion of buildgcc. The leading double slash causes buildgcc to fail when run from Windows/Msys2. Replace $DESTDIR/$TARGETDIR
with $DESTDIR$TARGETDIR to avoid the problem.

Change-Id: Ide2bae41c07c1566f80104c3a2e2acab53de0d17
Signed-off-by: Scott Duplichan <scott@notabs.org>
Reviewed-on: http://review.coreboot.org/7788
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2014-12-15 16:49:42 +01:00
Alexandru Gagniuc 0f0d497217 abuild: Don't print "Using payload ..." message in quiet mode
It's not useful in quiet mode, and is very distracting.

Change-Id: I59dc8caa22b66980560d5afb76eae801efaa29ad
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/124
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-12-11 05:10:27 +01:00
Patrick Georgi e420139a52 crossgcc: clean up aarch64 target integration
We already have aarch64 targets. Extend the "all" target.

Change-Id: I74d9bf5123695318c15b73c89f170f3ebb20aa80
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: http://review.coreboot.org/7729
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
2014-12-10 10:22:58 +01:00
Martin Roth ddb7a9d4a1 abuild: update output so multithreaded is decipherable
- add a 'quiet' mode that only prints important messages
- add vendor/mainboard to all strings printed

With quiet on, multithreaded looks like this:
skipping google/storm because we're missing compilers for (arm armv4 armv7)
iwill/dk8_htx built successfully. (took 5s)
jetway/j7f2 built successfully. (took 6s)
iwill/dk8x built successfully. (took 8s)
iwill/dk8s2 built successfully. (took 8s)
jetway/j7f4k1g5d built successfully. (took 10s)

With quiet off, single threaded now looks like this:
Building intel/emeraldlake2
Creating config file for intel/emeraldlake2...
    intel/emeraldlake2 (blobs, ccache)
intel/emeraldlake2 config created.
Compiling intel/emeraldlake2 image...
intel/emeraldlake2 built successfully. (took 5s)

And quiet off multithreaded looks like this:
Building iwill/dk8_htx
Creating config file for iwill/dk8_htx...
    iwill/dk8_htx (blobs, ccache)
intel/mohonpeak config created.
Compiling intel/mohonpeak image on 1 cpu...
intel/minnowmax config created.
--- snip ---
intel/mtarvon built successfully. (took 4s)
Building iwill/dk8s2
Creating config file for iwill/dk8s2...
    iwill/dk8s2 (blobs, ccache)
intel/mohonpeak built successfully. (took 5s)
Building iwill/dk8x

Change-Id: Ib7b9a625d77bb8e0663afc00d7133e415866ecec
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-on: http://review.coreboot.org/7716
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-12-10 00:17:31 +01:00
Marcelo Povoa 9b56b44eb6 aarch64: Add aarch64-elf toolchain to crossgcc Makefile
BUG=None
BRANCH=none
TEST=Build crosgcc for aarch64-elf
Signed-off-by: Marcelo Povoa <marcelogp@chromium.org>

Original-Change-Id: Ifc886b6bd125552855ad1cf49ee7c1b7a0350895
Original-Reviewed-on: https://chromium-review.googlesource.com/186413
Original-Reviewed-by: Stefan Reinauer <reinauer@chromium.org>
Original-Tested-by: Marcelo Póvoa <marcelogp@chromium.org>
Original-Reviewed-by: David Hendricks <dhendrix@chromium.org>
Original-Commit-Queue: Marcelo Póvoa <marcelogp@chromium.org>
(cherry picked from commit 9959047c82c96108f4bdedad1db0219fcdc85378)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>

Change-Id: I5e781443bb11a7db3420bb8cfc447de8494b1d24
Reviewed-on: http://review.coreboot.org/7661
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Tested-by: build bot (Jenkins)
2014-12-09 18:40:17 +01:00
Marcelo Povoa dcc1c86c7f aarch64: Add ELF support
BUG=None
BRANCH=none
TEST=Build coreboot
Signed-off-by: Marcelo Povoa <marcelogp@chromium.org>

Original-Change-Id: I38684794fdf5bd95a32f157128434a13f5e2a2d5
Original-Reviewed-on: https://chromium-review.googlesource.com/185271
Original-Reviewed-by: Stefan Reinauer <reinauer@chromium.org>
Original-Reviewed-by: David Hendricks <dhendrix@chromium.org>
Original-Tested-by: Marcelo Póvoa <marcelogp@chromium.org>
Original-Commit-Queue: Marcelo Póvoa <marcelogp@chromium.org>
(cherry picked from commit 67b74d3dc98a773c3d82b141af178b13e9bb6c06)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>

Change-Id: Id82a31dc94bb181f2d24eddcbfbfb6d6cdc99643
Reviewed-on: http://review.coreboot.org/7659
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2014-12-09 18:39:58 +01:00
Martin Roth 48a243b16e utils: Remove references to tracker from manpages
abuild, inteltool, and superiotool's manpages still referenced reporting
bugs to tracker.coreboot.org.  Remove that url and change the message
to point to the coreboot mailing list instead.

Change-Id: I7a85bc2b36ccdb7f3798a39a08345c1a02a67e65
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-on: http://review.coreboot.org/7712
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-12-09 03:02:56 +01:00
Vladimir Serbinenko 2697c0767b to-wiki.sh: Show the same status for clones.
While it may not be the best way theoretically as theoretically only one
of clones may fail if clones are not perfect, in practice there is more
variance between e.g. different X60 variants than between most of the clones,
yet we put all X60 variants together.
Also in most cases we don't even have a way to tell the clones apart.

Change-Id: I786aeed55300026fae0d9f0497d0c830a9f5e452
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/7564
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2014-12-04 09:03:24 +01:00
Paul Menzel 29635415a6 util/cbmem: Print name instead of ID of CBMEM_ID_SMM_SAVE_SPACE
Commit b4b9eb39 (x86: provide infrastructure to backup default SMM
region) introduced the new CBMEM type `CBMEM_ID_SMM_SAVE_SPACE`, but
did not add its name `SMM BACKUP` to the utility `cbmem`, causing the
following output, when running `cbmem` on a system making
use of `BACKUP_DEFAULT_SMM_REGION`.

	 7. 07e9acee   7f7e5000   00010000

Fix that by adding the name `SMM BACKUP` to the struct
`cbmem_id_to_name`.

Change-Id: Ib24088c07af4daf6b7d8d5854283b5faa2ad6503
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: http://review.coreboot.org/7176
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2014-12-03 12:33:43 +01:00
Patrick Georgi 59ab4e99ee nvramtool: make sure that strings are 0-terminated
The call site expects them to be.

Change-Id: Ic05fc5831f5743d94fe617dfb3b9e329f01866d1
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: http://review.coreboot.org/7621
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-12-02 11:02:17 +01:00
Andrew Engelbrecht e8905312f0 nvramtool: cmos_read(): Use malloc() instead of alloca()
Fixes crash occurring when 'nvramtool -a' tried to free a prematurely
freed pointer. (Tested on x60)

malloc() is correct because the pointer is accessed outside the calling
function. The pointer is freed in the parent function list_cmos_entry().

Change-Id: I1723f09740657f0f0d9e6954bd6d11c0a3820a42
Signed-off-by: Andrew Engelbrecht <sudoman@ninthfloor.org>
Reviewed-on: http://review.coreboot.org/7620
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2014-12-02 10:15:00 +01:00
Patrick Georgi 32a5a5f467 buildgcc: support DESTDIR for libelf
The libelf build system doesn't support the
DESTDIR variable. Work around by mangling prefix
when installing.

Change-Id: I3a56eb2bf919bcb9b586b945dce26a02dbaff931
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: http://review.coreboot.org/7613
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2014-11-30 12:20:17 +01:00
Patrick Georgi 02ac6c3572 build system: only do the compiler test for gcc
There isn't a history of broken clang compilers yet
so let's give it a chance.

Change-Id: Iddb63700e3850116313c1ddee69111f936191055
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: http://review.coreboot.org/7607
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-11-30 12:20:11 +01:00
Vladimir Serbinenko 8251e9070c Rewrite board_status in go.
This allows easy creation of redistribuable binary.

Change-Id: I12a82d509cd4bd46baeb4f4066e509c69301ab95
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/7565
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2014-11-26 23:18:58 +01:00
Vladimir Serbinenko bcc3a87c7e lint-stable: Ignore .bin files for whitespace check.
.bin is the most convenient format for storing SPDs and since it's
not text format, whitespace check is useless and gives false positives.

Change-Id: I8a7569eac8a1dfbffabe166a38e4dd3e895fdef1
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/7567
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2014-11-25 23:47:43 +01:00
Patrick Georgi e00196e803 buildgcc: Fix documentation
Change-Id: I3983d7a393260238b75e9f52e9451b454c551c30
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/7550
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-11-23 09:08:27 +01:00
Francis Rowe 3fb8b0d75b util/cbfstool/cbfs-mkstage.c: Fix build issue on 32-bit x86
Fixes regression caused by commit 405304ac
(cbfstool: Add option to ignore section in add-stage)

Change-Id: If9e3eea9ab2c05027f660d0057a635abf981b901
Signed-off-by: Francis Rowe <info@gluglug.org.uk>
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: http://review.coreboot.org/7545
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2014-11-21 19:46:18 +01:00
Patrick Georgi 3bff5d9064 crossgcc: Add buildsystem support for aarch64 compiler
This adds the crosstools-aarch64 and crossgcc-aarch64
make rules to create a toolchain (with or without gdb)
for AArch64 targets.

Also adapt xcompile, since it's aarch64-elf.

Change-Id: I6fbe09d44ee8b8493d3cd8dbbba869b409e311f7
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: http://review.coreboot.org/7527
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-11-20 13:54:59 +01:00
Patrick Georgi d730ca8529 crossgcc: Update GCC from 4.7.3 to 4.8.3 and update to version 1.25
gcc 4.9.2 fails on our tree right now. We should clean that
up and test before we make it the reference version.

Also, the AMD K8/Fam10 issue we had last year, for which
Vladimir provided an "untested" fix (which is in,
commit a6c29fe684), isn't
reproducible: I boot-tested an unpublished AMD K8 board
with coreboot built with gcc 4.8.3.
(Disclaimer: since the old issue depended on compiler
decisions on register allocation, any change to code
or compiler could mix up things in semi-random ways.)

Change-Id: I8f1460a8da2c9e2d581482b22a4824b10b8987fa
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: http://review.coreboot.org/7526
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2014-11-20 13:54:57 +01:00
Patrick Georgi 129462da1b kconfig: create files in target directory if requested
Otherwise rename() fails when used across filesystem
boundaries.

Change-Id: I22a62310f0e46ac9cfee50b7e9eeed93536ed409
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: http://review.coreboot.org/7504
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Tested-by: build bot (Jenkins)
2014-11-18 08:25:50 +01:00
Patrick Georgi 7d221b4ef2 nvidia/cbootimage: update to master
It contains a number of fixes to bugs found
by Coverity Scan.

Change-Id: I362a069afd37783f59d8831e44ae885e8490819e
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/7392
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2014-11-14 16:38:33 +01:00
Patrick Georgi c32b4a40d2 abuild: pass compiler configuration options to tool building step
This is required to run abuild parallely with clang
without the canonical coreboot toolchain installed.

Change-Id: Iea56d3f552d50ab6e762afa134091b0d8e38792c
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/7369
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2014-11-09 22:46:47 +01:00
Felix Held fac95e3bfe inteltool: add more hardware IDs and PCIEXBAR/PXPEPBAR read support
Add IDs of some SNB and Haswell chips; use more descriptive names.
Add PCIEXBAR and PXPEPBAR read support for SNB/IVB/Haswell.

Change-Id: I16753bf90061fc2065b813b1c2169e7b7bcc89e8
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: http://review.coreboot.org/7360
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Mathias Krause <minipli@googlemail.com>
2014-11-09 21:11:27 +01:00
Mathias Krause 5ad6ec55f8 inteltool: Fix message in case of multiple LPC controllers
If we find multiple LPC controllers, we want to tell the user that we'll
ignore all but the first. However, we use 'dev' in the message (the
current device found) instead of 'sb' (the one we want to use).

Fix the message by using 'sb' and break the loop right away in this
case. It's sufficient to tell the user once which LPC controller we'll
use.

Change-Id: Ibd27e40525fabe8c63b112691ad49fd994c70a48
Signed-off-by: Mathias Krause <minipli@googlemail.com>
Reviewed-on: http://review.coreboot.org/7342
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
2014-11-06 06:45:48 +01:00
Felix Held 0cc8f29316 inteltool: Add support for Sandy Bridge desktop processors
Change-Id: I5e68b89c30d5550e4bce5c3e4c7b0689c38756bc
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: http://review.coreboot.org/7337
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Mathias Krause <minipli@googlemail.com>
2014-11-06 06:44:29 +01:00