Commit Graph

5760 Commits

Author SHA1 Message Date
Sven Schnelle d69438e05e BUILD: add missing config.h dependency
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Acked-by: Patrick Georgi <patrick.georgi@secunet.com>

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6467 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-03-29 09:01:10 +00:00
Zheng Bao 910f4ca5c5 Add support for Supermicro H8scm.
It is AMD C32 + SR5650 + SP5100.
It is created by svn copy amd/tilapia_fam10.

Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Marc Jones <marcj303@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6466 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-03-28 04:38:14 +00:00
Zheng Bao d3de3eed7b Add the SR5650 & SP5100 to the Kconfig and Makefile.inc
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Marc Jones <marcj303@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6465 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-03-28 04:36:21 +00:00
Zheng Bao 2ca2f17724 Add AMD C32 support.
It is based on other existing Fam10 code.

Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Marc Jones <marcj303@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6464 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-03-28 04:29:14 +00:00
Zheng Bao c3422235b1 SP5100's code is based on SB700. Change the legacy sb700 of sb7xx_51xx.
Since the SB700 has changed to sb7xx_51xx, change legacy name in
other mainboard.

Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Marc Jones <marcj303@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6463 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-03-28 03:33:10 +00:00
Zheng Bao 98fcc09cf9 Add AMD SR56x0 support.
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Marc Jones <marcj303@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6462 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-03-27 16:39:58 +00:00
Zheng Bao 8a281880a3 This is for board Supermicro H8scm. The code was done by existing chips and
superiotool.

WPCM450 is more like an EC. SuperIO is just a part of multi-features.

Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Acked-by: Marc Jones <marcj303@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6461 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-03-27 16:33:09 +00:00
Prakash Punnoor fde7025b61 I noticed some registers of Winbond W83627DHG, which the datasheet mentions, were not dumped by superiotool. This patch adds those registers to the dump.
Signed-off-by: Prakash Punnoor <prakash@punnoor.de>
Acked-by: Marc Jones <marcj303@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6460 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-03-25 16:54:38 +00:00
Patrick Georgi 13c16cbd68 libpayload: Fix documentation
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Acked-by: Patrick Georgi <patrick.georgi@secunet.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6459 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-03-22 13:40:09 +00:00
Sven Schnelle 0446f9630b X60: Add notification for LID objects
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Acked-by: Sven Schnelle <svens@stackframe.org>

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6458 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-03-21 14:43:21 +00:00
Sven Schnelle e10699905e X60: remove beep call from _Q26/_Q27
no need to trigger sound, the EC takes care of generating the annoying
AC state beep if enabled in the sound mask.

Signed-off-by: Sven Schnelle <svens@stackframe.org>
Acked-by: Sven Schnelle <svens@stackframe.org>

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6457 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-03-21 14:43:09 +00:00
Sven Schnelle e6de7069de BUILD: add -MMD to iasl cpp call
Right now there are no dependency rules for compiling dsdt.asl.
If ACPI code includes asl files, the dsdt isn't recompiled if any
of those file is changed. Add the flags to the preprocessor call
to have it generate the neccessary dependency rule.

Signed-off-by: Sven Schnelle <svens@stackframe.org>
Acked-by: Peter Stuge <peter@stuge.se>

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6456 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-03-20 19:34:05 +00:00
Stefan Reinauer 4cf7879cf0 oops, one URL fix was missing. Add new DirectHW URL
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6455 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-03-18 22:53:38 +00:00
Stefan Reinauer cff573d3a4 DirectHW fixes for coreboot utilities
See http://www.coreboot.org/DirectHW for more information

Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6454 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-03-18 22:08:39 +00:00
Marc Jones 4a46e89c75 Fix breaking the build after removing files in tthe previous checkin.
Signed-off-by: Marc Jones <marcj303@gmail.com>
Acked-by: Marc Jones <marcj303@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6453 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-03-17 23:14:24 +00:00
Frank.Vibrans 9c2fb60bfc Perform cleanup and file shrinkage of the AMD AGESA code.
Signed-off-by: Frank.Vibrans <frank.vibrans@amd.com>
Acked-by: Marc Jones <marcj303@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6452 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-03-17 22:19:45 +00:00
Josef Kellermann ea1c0a714d Fix power_on_after_fail handling on AMD SB600
Bit 0 of pm reg#74 have to be set turn on system after power resumes.
See '42661_sb600_rrg_nda_3.02.pdf' (or '46155_sb600_rrg_pub_3.03.pdf')
for details, look for 'PwrFailShadow'.

[Patrick: I didn't include the get_options reorganization as get_option
doesn't overwrite "on" if power_on_after_fail isn't found in CMOS.
Style changes were also left out.]

Signed-off-by: Josef Kellermann <seppk@arcor.de>
Acked-by: Patrick Georgi <patrick.georgi@secunet.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6451 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-03-17 12:34:15 +00:00
Patrick Georgi 3eb5e4e9a3 libpayload: fix string-to-numeric functions for base > 10
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Acked-by: Patrick Georgi <patrick.georgi@secunet.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6450 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-03-17 12:20:04 +00:00
Patrick Georgi b8e9ba9a7a More complete control over KERNELVERSION variable
Allow using revision information (from svn or git) even if the version
number is changed on the command line (eg. make KERNELVERSION='11.03$(REV)')
or dropping it entirely if having that information in the coreboot binary is
not desired.

Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6449 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-03-17 07:47:49 +00:00
Sven Schnelle 08827287d6 X60: Clear EC events when wake GPE is triggered
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Acked-by: Peter Stuge <peter@stuge.se>

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6448 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-03-15 09:52:17 +00:00
Sven Schnelle f9a0b927f5 ACPI EC: add ec_query function
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Acked-by: Peter Stuge <peter@stuge.se>

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6447 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-03-15 09:52:07 +00:00
Sven Schnelle 07ca1c47b2 X60: LPC bus is LPCB, not LPC
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Acked-by: Sven Schnelle <svens@stackframe.org>

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6446 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-03-14 15:23:44 +00:00
Sven Schnelle 91c31dac0c X60: fix typo in dsdt.asl
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Acked-by: Sven Schnelle <svens@stackframe.org>

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6445 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-03-14 14:26:41 +00:00
Sven Schnelle b188a9309d X60: Add _PRW/_PSW methods to LID/SLPB objects
This patch adds the required methods for enabling/disabling
the LID and SLPB objects as wake source. On Thinkpads, the
Fn key can (and is by the Vendor BIOS) programmed as Wake source,
so let's do it the same way.

Signed-off-by: Sven Schnelle <svens@stackframe.org>
Acked-by: Peter Stuge <peter@stuge.se>

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6444 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-03-14 13:42:08 +00:00
Stefan Reinauer 9018b6ee64 msrtool: Update to use DirectHW on Mac OS X
http://www.coreboot.org/DirectHW

Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6443 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-03-14 09:08:27 +00:00
Sven Schnelle 0238a9caa3 ec/acpi: make ACPI register pair configurable
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6442 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-03-14 08:18:27 +00:00
Sven Schnelle 8d94d7c4a7 ACPI EC: add ec_set_bit() / ec_clr_bit()
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Acked-by: Sven Schnelle <svens@stackframe.org>

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6441 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-03-14 08:18:17 +00:00
Mathias Krause 155c379b74 nvramtool: Move code so it has access to the right data structures
Signed-off-by: Mathias Krause <mathias.krause@secunet.com>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6440 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-03-10 07:52:02 +00:00
Scott Duplichan 314dd0bee5 Enable mahogany_fam10 and Kino family 10h to run the SB HT link at the expected HT3 frequency and width by matching the BUID swap list to the production BIOS. In addition, the BUID swap list has been moved into the project-specific file romstage.c for the other 13 AMD family 10h projects as well. For projects using a desktop AMD family 10h processor, pasting in the mahogany_fam10 swap list will likely allow HT3 operation. This should be confirmed on real hardware before commiting any swap list change. A different swap list will be needed for server projects. For serengeti_cheetah_fam10, a reference BIOS swap list to try is: 0x00, 0x0A, 0x00, 0x06, 0xFF, 0x0A, 0x06, 0xFF.
The patch makes these changes:

1) Remove the BUID swap list from ht_wrapper.c and put it in each of 15
   romstage.c files where it is used (AMD family 10h projects).
2) Add a prototype to amdfam10.h.
3) Modify the swap list and test in real hardware for mahogany_fam10 and
   kino family 10h and confirm HT3 operation for the SB link.

Abuild tested.

Signed-off-by: Scott Duplichan <sc...@notabs.org>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6439 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-03-08 23:01:46 +00:00
Patrick Georgi 57205c7e43 Add option_table.h as dependency for all C based object files if option tables are used.
This is to make sure that the file exists when it is needed. While this isn't the case for every C source file, it doesn't hurt either to create the file a bit sooner than strictly necessary.

Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Acked-by: Jonathan Kollasch <jakllsch@kollasch.net>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6438 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-03-08 20:49:18 +00:00
Mathias Krause 943b8b5997 nvramtool: Change precedence order for data sources
nvramtool couldn't handle certain combinations of sources for CMOS
layout and CMOS data. This change allows for nearly all combinations.

Signed-off-by: Mathias Krause <mathias.krause@secunet.com>
Acked-by: Patrick Georgi <patrick.georgi@secunet.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6437 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-03-08 12:58:16 +00:00
Patrick Georgi fab35e3f73 Move cmos.default handling to bootblock
The cmos.default code wasn't actually used so far, due to an oversight
when forward-porting this feature from an old branch.

- Extend walkcbfs' use by factoring out the stage handling into C code.
- New sanitize_cmos() function that looks if CMOS data is invalid and
  cmos.default exists and if so overwrites CMOS with cmos.default data.
- Use sanitize_cmos() in both bootblock implementations.
- Drop the need to reboot after writing CMOS: CMOS wasn't used so far,
  so we can go on without a reboot.
- Remove the restriction that cmos.default only works on CAR boards.
- Always build in cmos.default support on boards that
  USE_OPTION_TABLE.

Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6436 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-03-08 07:50:43 +00:00
Sven Schnelle 85e666dc37 X60: add thermal zone 1
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Acked-by: Peter Stuge <peter@stuge.se>

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6435 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-03-07 09:09:51 +00:00
Sven Schnelle b641e98839 X60: add thermal zone 0
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Acked-by: Peter Stuge <peter@stuge.se>

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6434 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-03-07 09:00:50 +00:00
Michael Karcher 5fb8fc093f Add support for the NSC PC87364 Super I/O.
superiotool -deV output:
http://www.flashrom.org/pipermail/flashrom/2011-March/005878.html

Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6433 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-03-06 17:58:31 +00:00
Jonathan Kollasch 09b36291f7 Add P-states for select Socket 754 processors.
States for AMA3000BEX5AR, SDA3100AIO3BX, and SDA3400AIO3BX
are from AMD document 30430 3.51.  States for ADA3200AIO4BX
derived from SSDT of a MS-7135.  States for TMDML34BKX5LD derived
from legacy PowerNow! table of a MS-7135, and therefore lack accurate
TDP information.

Signed-off-by: Jonathan Kollasch <jakllsch@kollasch.net>
Acked-by: Marc Jones <marcj303@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6432 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-03-04 20:01:15 +00:00
Patrick Georgi c9a08ddafd Redo r6099 after copy&pasted code reintroduced DIMMx #defines
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Acked-by: Patrick Georgi <patrick@georgi-clan.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6431 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-03-04 17:09:21 +00:00
Jonathan Kollasch d5782f3588 Correct off-by-one problem in AMD pre-rev-F model-F PowerNow code.
With this change the last P-state entry of the last CPU in the table
is successfully conveyed into the SSDT.

Signed-off-by: Jonathan Kollasch <jakllsch@kollasch.net>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6430 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-03-03 23:09:43 +00:00
Jonathan Kollasch fadb004359 Improve ck804 IOAPIC and HPET resource handling.
Signed-off-by: Jonathan Kollasch <jakllsch@kollasch.net>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6429 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-03-03 20:52:50 +00:00
jakllsch a73ffa0a3e Configure PCIe lanes on ms7135 as original BIOS does.
Signed-off-by: <jakllsch@kollasch.net>
Acked-by: <jakllsch@kollasch.net>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6428 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-03-03 15:36:08 +00:00
Sven Schnelle 071d835976 add PC87384 SuperIO
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Acked-by: Peter Stuge <peter@stuge.se>

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6427 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-03-03 08:29:03 +00:00
Alexandru Gagniuc 7b9bbeeed8 Fixes licensing of src/southbridge/via/k8t890/k8x8xx.h to GPLv2+ from GPLv3.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6426 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-03-02 19:56:28 +00:00
Sylvain "ythier" Hitier 82419413b1 Fix some subsystemid statements in r6421
Signed-off-by: Sylvain "ythier" Hitier <sylvain.hitier@gmail.com>
Acked-by: Sven Schnelle <svens@stackframe.org>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6425 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-03-01 22:02:37 +00:00
Sylvain "ythier" Hitier 5325a48340 [SCONFIG] remove unused variable in inherit_subsystem_ids()
i is a leftover from debugging, no longer needed. So just remove it.

Signed-off-by: Sylvain "ythier" Hitier <sylvain.hitier@gmail.com>
Acked-by: Sven Schnelle <svens@stackframe.org>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6424 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-03-01 21:57:11 +00:00
Sven Schnelle b8269e2111 Fix a simple whitespace error in src/include/device/device.h
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Acked-by: Sven Schnelle <svens@stackframe.org>
Reported-by: Stefan Reinauer <stefan.reinauer@coreboot.org>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6423 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-03-01 21:51:29 +00:00
Sven Schnelle 750edfd88c Add lex output
lex.yy.c_shipped wasn't committed in r6420, which breaks the build
if you don't have the expert option checked that rebuilds those files.

Signed-off-by: Sven Schnelle <svens@stackframe.org>
Acked-by: Sven Schnelle <svens@stackframe.org>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6422 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-03-01 21:43:57 +00:00
Sven Schnelle 91321028ec Use subsystem id from devicetree.cb instead of Kconfig and move
all boards to the new config scheme.

Signed-off-by: Sven Schnelle <svens@stackframe.org>
Acked-by: Peter Stuge <peter@stuge.se>

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6421 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-03-01 19:58:47 +00:00
Sven Schnelle 270a908646 Add subsystemid option to sconfig
Allow user to add 'subsystemid <vendor> <device> [inherit]' to devicetree.cb for
PCI and PCI domain devices.

Example:

	device pci 00.0 on
	       subsystemid dead beef
	end

If the user wants to have this ID inherited to all subdevices/functions,
he can add 'inherit', like in the following example:

	device pci 00.0 on
	       subsystemid dead beef inherit
	end

If the user don't want to inherit a Subsystem for a single device, he can
specify 'subsystemid 0 0' on this particular device.

Signed-off-by: Sven Schnelle <svens@stackframe.org>
Acked-by: Peter Stuge <peter@stuge.se>

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6420 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-03-01 19:58:15 +00:00
Patrick Georgi e38d0a6743 Fix double inclusion of toplevel Makefile.inc
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Acked-by: Patrick Georgi <patrick.georgi@secunet.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6419 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-03-01 08:09:22 +00:00
Patrick Georgi 11ac1cfaa3 Mark non-returning function as noreturn to help some compiler versions
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Acked-by: Patrick Georgi <patrick.georgi@secunet.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6418 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2011-03-01 07:30:14 +00:00