Commit Graph

4921 Commits

Author SHA1 Message Date
Stefan Reinauer c598fd8d4a Update goswid submodule to upstream master
Updating from commit id bdd55e4:
2022-08-11 13:59:07 +0200 - (Add json minify to remove comments in JSON files)

to commit id 567a1c9:
2023-01-18 20:38:13 +0100 - (Fix README.md uSWID table)

This brings in 5 new commits:
567a1c9 Fix README.md uSWID table
f5fd52f Add PlantUML Documentation
cd56b5b Add uSWID Documentation
1a294af Add more comprehensive example in README
b0e66ae Add plantuml output

Change-Id: Ib399578a20c5c64978edf4b6198439bf6983ea44
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75797
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
2023-06-12 00:51:50 +00:00
Stefan Reinauer b082e9ca36 Update cbootimage submodule to upstream master
Updating from commit id 65a6d94:
2019-07-17 17:47:14 -0600 - (Free image buffer on read error)

to commit id 80c499e:
2019-09-19 12:41:46 -0600 - (Correct spelling mistakes)

This brings in 1 new commits:
80c499e Correct spelling mistakes

Change-Id: I0557e7116052e98266ee1d078a078d698232bb2c
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75798
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-06-12 00:51:21 +00:00
David Hendricks 09b573ff75 board_status: Point to documentation in header
This adds a pointer to the README and to the wiki in the header of
board_status.sh.

Change-Id: I5877a3bf3544f175ac74a5e5a8e1ef1cab366ab8
Signed-off-by: David Hendricks <david.hendricks@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/21569
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-06-10 01:44:06 +00:00
Evgeny Zinoviev 88a54db592 util/inteltool: Fix building with musl libc
1. Make sure __always_inline is defined.
2. To test if we're on Linux, check presence of __linux__
   instead of __GLIBC__.

Change-Id: I2ccfc4d2ef4c60877e24508f9926b533cffec0ed
Signed-off-by: Evgeny Zinoviev <me@ch1p.io>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50412
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2023-06-10 00:52:54 +00:00
Peter Lemenkov ac0e7448e4 util/inteltool: suggest booting with iomem=relaxed
Signed-off-by: Peter Lemenkov <lemenkov@gmail.com>
Change-Id: Ib80efd7d1ba516cb0ae4bdb86f95877855195ce0
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63999
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-06-10 00:25:04 +00:00
Nico Huber b992df9891 util/qemu: Revise q35 configs
Add an NVMe drive and be more conservative with hotplug-capable PCIe
ports. QEMU treats everything as hotpluggable by default, so devices
can be added at runtime. However, this leads to unrealistic resource
allocations with PCIEXP_HOTPLUG enabled.

Tested recent allocator changes with QEMU/Q35 config and:

  $ make qemu QEMU_EXTRA_CFGS=util/qemu/q35-alpine.cfg

Change-Id: I23746b642329356c6767b04ec177cd9411e3adb9
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67026
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
2023-06-04 19:21:13 +00:00
Elyes Haouas 44f676afc9 crossgcc: Upgrade LLVM from version 16.0.4 to 16.0.5
Change-Id: I1f227bf55bac51e6226ca5d13156e54220e33629
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75635
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-06-04 18:29:42 +00:00
Elyes Haouas dea0f21c4b crossgcc: Upgrade CMake from version 3.26.3 to 3.26.4
Change-Id: Id6dca6be8f7a82eadcbc18b4736219faf51b843c
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75634
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
2023-06-04 18:29:20 +00:00
Karthikeyan Ramasubramanian d7a5d9e9da util/amdfwtool: Add ability to split hash table
Hash table containing hashes of all signed PSP binaries is compiled at
build time and installed into the concerned CBFS. During boot, PSP
verstage reads the hash table binary and passes it to PSP bootloader.
PSP bootloader in turn uses the hash table to verify the signed PSP
binaries. Currently the hashes for all the signed PSP binaries are
compiled into one hash table. On upcoming platforms with more number of
signed PSP binaries, PSP bootloader does not have resources to handle
one monolithic hash table. Instead PSP bootloader recommends splitting
them into smaller hash tables (currently limited to 3 hash tables).

Update amdfwtool tool to support splitting hash tables. This is done by
adding an optional hash table id to the entries in the amdfw.cfg file.
By default, one hash table binary is always compiled and it's name is of
the format ${signed_rom}.hash. If an entry has a hash table id defined,
then this utility will compile a separate hash table binary whose name
is of the format ${signed_rom}.${N}.hash where N is the hash table id.

BUG=b:277292697
TEST=Build Skyrim BIOS image and boot to OS. Ensure that the hash table
is identical with and without this change. Perform suspend/resume
cycles, warm/cold reset cycles for 50 iterations each.
TEST=Artificially inject hash table id against some entries in
amdfw.cfg and ensure that the concerned hash table binaries are getting
compiled.

Change-Id: I7ef338d67695a34c33b5c166924832939f381191
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75188
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
2023-06-02 22:19:44 +00:00
Martin Roth 5a4cedb9c1 util/docker: Split coreboot-sdk test into its own docker image
This allows the coreboot-sdk docker image to build properly even if the
testing fails, and keeps the added overhead out of the coreboot-sdk
image.

Signed-off-by: Martin Roth <gaumless@gmail.com>
Change-Id: I6488799256f57ad64e14c93e7317b7ad2a71781c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75494
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
2023-06-02 22:12:27 +00:00
Fred Reitberger 9d6008ea5b amdfwtool: Only use AMD_FW_RECOVERYAB_A on phoenix
BUG=285390041

Signed-off-by: Fred Reitberger <reitbergerfred@gmail.com>
Change-Id: I4321c6a8553b470096aec263fb4b15b831efae7f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74971
Reviewed-by: Tim Van Patten <timvp@google.com>
Reviewed-by: Jon Murphy <jpmurphy@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-06-02 20:14:26 +00:00
Grzegorz Bernacki dfdf81c32e amdfwtool: Add --output-manifest option
Passing this option tells amdfwtool to create a text file, containing
the versions of the blobs below:
- PSP bootloader (type 0x01),
- SMU firmware (type 0x08),
- AGESA bootloader 0 (type 0x30),
- PSP bootloader AB (type 0x73).

Created file can be embedded into CBFS which allows to read the version
of blobs at runtime. This way version of blobs used to build the
coreboot image can be verified at runtime and also from the binary file.

Format of manifest file is following:

    $ cat build/amdfw_manifest
    type: 0x01 ver:00.35.00.13
    type: 0x08 ver:00.5a.23.a6
    type: 0x30 ver:2a.14.b0.10
    type: 0x73 ver:00.35.00.13

BUG=b:224780134
TEST=Tested on Skyrim device

Change-Id: Idaa3a02ace524f44cfa656e34308bd896016dff6
Signed-off-by: Grzegorz Bernacki <bernacki@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74266
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
2023-06-02 17:35:56 +00:00
Elyes Haouas a84823d078 util/crossgcc: Update nasm from 2.15.05 to 2.16.01
Timeless build for QEMU (i440fx/piix4) does not modify the binary.
New patch is add to fix the build in a separate directory from the source.

Change-Id: Ib69437be8ee69ad62fb1dfbbafabc2c4c885b7b2
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73740
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
2023-05-29 21:06:41 +00:00
Subrata Banik 9cd85d0859 util/ifdtool: Add support for Intel 800 series chipset
This commit adds support for Intel 800 series chipset. The new chipset
can be uniquely identified by its SPI speed, eSPI speed, and
chipset name.

This commit message is clear and concise, and it accurately describes
the changes that were made to the code. It also includes the following
information:

- Specify the correct chipset name.
  "PCH Revision: 800 series Meteor Lake"
- Show the valid eSPI/EC frequency.
  "Read eSPI/EC Bus Frequency: 20MHz"

Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: I70619d9e3ed2bcad86f84a0527e3a0ad13acd706
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75433
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
2023-05-27 04:01:45 +00:00
Felix Held 91795a6da1 libpayload;arch,cpu/x86: drop USE_MARCH_586 Kconfig option
Only the Intel Quark SoC selected this option and that SoC was dropped
in commit 531023285e ("soc/intel/quark: Drop support"), so drop this
Kconfig option too.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ic4f1c7530cd8ac7a1945b1493a2d53a7904daa06
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75473
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-05-27 00:29:02 +00:00
Zheng Bao e8183599ae commit-msg: Match the Signed-off-by line with name and mail address
The previous regular expression only matches the line starting with
"Signed-off-by:". If the name and mail address are missing, it can not
find out. The following words should be "name <mail@xxx.com>".

Change-Id: I42cc399e79b65928a6aef87c51e5476c7158d166
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73340
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
2023-05-26 21:16:32 +00:00
Elyes Haouas a28e2358c2 util/crossgcc: Update binutils-2.40 import set_entry_point patch
Import set_entry_point patch from https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=3539414584be0094b0a4fe56dfd64ea79d802edc
to fix issue in binutils 2.40 with LTO when applied to
PE/PE+ binaries (i.e. UEFI).

Change-Id: I3844b53c8761239932ce91c2ff19ed0402321d1a
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74974
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
2023-05-26 15:17:45 +00:00
Elyes Haouas 9c599c8b30 crossgcc: Upgrade IASL from 20221020 to 20230331
Changes: https://acpica.org/node/202

Change-Id: I43fc180bd51ff7cb06a67619c8350d28b086bc90
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74272
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
2023-05-25 20:18:36 +00:00
Felix Singer 38453784d7 util/crossgcc: Add empty directory for tarballs
A directory for tarballs is needed in any case but it's created at build
time. However, in reproducible build environments the sources are
downloaded before the buildgcc scripts runs and the directory needs to
be created.

Thus, to simplify that, add an empty tarballs directory.

Change-Id: Id3b4bf918c93f10c145f580684e916a4f8bae3b1
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75273
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
2023-05-24 21:11:21 +00:00
Zheng Bao 948c0b7947 amdfwtool: Set the minimum size of entry PSPL2 A/B
This is a PSP FW requirement.
This is only for recovery A/B without ISH header. That means only
Cezanne.

Change-Id: I62616d5a866f66fc71e6c0b31a23c62dc11cf3c6
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75161
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
2023-05-24 12:24:28 +00:00
Elyes Haouas cf993bd343 crossgcc: Upgrade LLVM version 15.0.7 to 16.0.4
Change-Id: I753bbcf3f03907b0cf966454c3dd6c9b61869599
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73792
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
2023-05-23 13:34:51 +00:00
Konrad Adamczyk d6b4db159b util: Use common ARRAY_SIZE define
Remove duplicated definitions of ARRAY_SIZE macro across util/ dir.
Instead of duplicates, use the one from commonlib/bsd/helpers.h file.

BUG=b:231765496
TEST=make -C util/cbfstool; make -C util/cbmem;
     make -C util/intelmetool; make -C util/superiotool

Change-Id: I29b776586b4f0548d4026b2ac77095791fc9f3a3
Signed-off-by: Konrad Adamczyk <konrada@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74474
Reviewed-by: Jakub Czapiga <jacz@semihalf.com>
Reviewed-by: Grzegorz Bernacki
Reviewed-by: Robert Zieba <robertzieba@google.com>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-05-22 19:24:27 +00:00
Krystian Hebel 9ab3a1fe4a util/kconfig: Fix default value getter for integer options
CB:37152 was supposed to be uprev to Linux's kconfig, but it got this
one case wrong, Linux never returned "0" [1]. As a result, when an
option has default value different than 0, and it was changed to 0,
savedefconfig skips saving it. However, during the build from such
defconfig the option is assigned default value.

TEST=Set SEABIOS_DEBUG_LEVEL to 0 and see that savedefconfig writes
it to defconfig file.

[1] 7cf3d73b43

Signed-off-by: Krystian Hebel <krystian.hebel@3mdeb.com>
Change-Id: I821e45dcec99904fab85f136298cbd0315237ff6
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72650
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>
2023-05-22 12:34:50 +00:00
Felix Singer fb03140757 util/docker: Add Dockerfile for Arch Linux
Add a minimal Dockerfile that pre-installs necessary software which is
needed to work with coreboot.

Change-Id: I85f3dc7b28b77989f0f1400d1282ed4b17082f65
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74481
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
2023-05-17 19:55:18 +00:00
Caveh Jalali fe95f83fd8 util/chromeos: Add EC header update utility
This adds a new utility for copying ec_commands.h and ec_cmd_api.h from
the chrome EC repo with the appropriate copyright header adjustment.

It is invoked as:

 util/chromeos/update_ec_headers.sh [EC-repo]

where EC-repo is the top of the EC repo from which header files are to
be obtained.

The corresponding files in src/ec/google/chromeec are updated but not
committed. Also, a commit message is suggested with the original git
versions for reference.

BUG=b:258126464

Change-Id: Ib43c75d807dd925b2c4bff425c07a36b4b4582c4
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74879
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Boris Mittelberg <bmbm@google.com>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
2023-05-16 16:34:17 +00:00
Nicholas Chin 8bf53c0162 util/scripts/show_platforms.sh: Fix reStructuredText table output
reStructuredText grid tables require row separators otherwise the rows
get concatenated into a single cell for each column.

Representative output of previous behavior:
```eval_rst
+-------------------------+-------------------+------------+----------+
| Vendor/Board            | Processor         | Date added | Brd type |
+=========================+===================+============+==========+
| 51nb/x210               | INTEL_KABYLAKE    | 2020-03-16 | laptop   |
| acer/aspire_vn7_572g    | INTEL_SKYLAKE     | 2022-01-28 | laptop   |
| acer/g43t-am3           | INTEL_X4X         | 2020-09-28 | desktop  |
+-------------------------+-------------------+------------+----------+
```

Representative output of corrected behavior:
```eval_rst
+-------------------------+-------------------+------------+----------+
| Vendor/Board            | Processor         | Date added | Brd type |
+=========================+===================+============+==========+
| 51nb/x210               | INTEL_KABYLAKE    | 2020-03-16 | laptop   |
+-------------------------+-------------------+------------+----------+
| acer/aspire_vn7_572g    | INTEL_SKYLAKE     | 2022-01-28 | laptop   |
+-------------------------+-------------------+------------+----------+
| acer/g43t-am3           | INTEL_X4X         | 2020-09-28 | desktop  |
+-------------------------+-------------------+------------+----------+
```

Change-Id: I83be58dd2c34c65ae2c65cf2bd98330936fb6f6a
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72624
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
2023-05-11 16:53:23 +00:00
Maximilian Brune 8d1051f4aa util/inteltool: Add ADL-S device identifications
R680E, Q670E, H610E are the ADL-S IoT variants

see also:
commit a0bc90e4ab ("Add missing ADL-S device identification")

Signed-off-by: Maximilian Brune <maximilian.brune@9elements.com>
Change-Id: I1dbfa0464bc22f9bcf91d9e9fa9eb79132600175
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74360
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
2023-05-11 13:05:45 +00:00
Karthikeyan Ramasubramanian dc4989351f util/amdfwtool: Consolidate entry line regex pattern
There are 2 regex patterns defined to process the lines from *fw.cfg:
1) for lines with mandatory entries
2) for lines with mandatory + optional entries

Consolidate the regex pattern. Add enums for matching regex caller
groups so that the human readable group IDs can be used instead of magic
numbers.

BUG=None
TEST=Build Skyrim BIOS which only have mandatory entries. Build Guybrush
BIOS image which have both mandatory and optional entries. Confirm that
the amdfw.rom built before and after this change have matching SHA in
both Skyrim and Guybrush images. This ensures that the optional level
entries in Guybrush are handled as expected. Boot to OS in Skyrim.

Change-Id: I7289ddbbec4d5daefe64f59b687ba3a4af46d052
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74950
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Van Patten <timvp@google.com>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
2023-05-08 13:15:53 +00:00
Fred Reitberger a194e6252f amdfwtool: Increase MAX_PSP_ENTRIES
The MAX_PSP_ENTRIES constant reserves space for the psp directory table
entries. This table is aligned to 4K and the next binary is also aligned
to 4K. The number of psp directory entries on Birman exceeds the
previous limit, so increase it to the maximum that will fit in a 4K
block.

TEST=timeless builds for Birman unchanged

Signed-off-by: Fred Reitberger <reitbergerfred@gmail.com>
Change-Id: I297edc9cccffde0ad1ce7461b375542f9f2f7c23
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73653
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Bao Zheng <fishbaozi@gmail.com>
Reviewed-by: Nikolai Vyssotski <nikolai.vyssotski@amd.corp-partner.google.com>
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
2023-04-28 15:12:47 +00:00
Maximilian Brune 2c895aaac3 util/ifdtool/ifdtool.c: Fix default FMAP generation
According to SPI programming guide, a region limit of 0 as well as
region base of 7FFFh indicates an unused/reserved region.

Signed-off-by: Maximilian Brune <maximilian.brune@9elements.com>
Change-Id: I790d7f5631ecef3043b2c17c41430dc4fd854f72
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74735
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
2023-04-27 20:45:14 +00:00
Konrad Adamczyk 8120cb4166 util/cbmem: Add REG_NEWLINE flag to fix matching pattern
Match-any-character operators (eg. ".*") shall not match newline
characters for BANNER_REGEX, since given regular expression
matches newline explicitly.

Add REG_NEWLINE flag to `regcomp` call.

BUG=b:278718871
TEST=Boot firmware on skyrim, reboot.
Run `cbmem -2`.
`cbmem -2` returns second-to-last boot log.

Change-Id: I9e924349ead0fa7eea8b9ad5161138a4c4946ade
Signed-off-by: Konrad Adamczyk <konrada@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74742
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2023-04-27 00:39:12 +00:00
Felix Singer a87da91719 util/docker/jenkins-node: Drop Zephyr SDK
The version of the Zephyr SDK that is used is quite old and Zephyr
hasn't been really used. Thus, drop it and also its dependencies from
u-boot.

Change-Id: Ie498d687e1566133adf650166117d8f68fcfdaf6
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73979
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Patrick Georgi <patrick@coreboot.org>
2023-04-25 05:36:13 +00:00
Felix Singer fa41fef557 util/docker/jenkins-node: Allow pip to install packages system-wide
Call pip3 with `--break-system-packages` allowing it to install packages
system-wide. This fixes building the Docker container.

Change-Id: Id093f2c69fec43556c434fbca7b36095a7e6bd97
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74292
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
2023-04-25 05:36:03 +00:00
Felix Singer 98d7157a6d util/docker/jenkins-node: Merge package installations into first step
It's not necessary to have multiple steps for installing packages and
requirements. Just merge the two install steps to one.

Change-Id: Ibe620e5b20a5f1a5d4e1c4c98942c136f450f280
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74245
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
2023-04-25 05:35:57 +00:00
Kyösti Mälkki a9dd3c3fae lib/version: Move board identification strings
These strings are now only expanded in lib/identity.c.

This improves ccache hit rates slightly, as one built object file
lib/version.o is used for all variants of a board. Also one built
object file lib/identity.o can become a ccache hit for successive
builds of a variant, while the commit hash changes.

Change-Id: Ia7d5454d95c8698ab1c1744e63ea4c04d615bb3b
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74449
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2023-04-22 16:20:49 +00:00
Karol Zmyslowski b2f5a22c4a util/inteltool: Add support for Jasper Lake
Tested on: Intel N5105 (Jasperlake Family, Intel Celeron processor)
Based on Intel Pentium Silver and Intel Celeron Processor Datasheet,
        vol. 2 of 2 revision 001 (DOC# 634545)

Change-Id: If4134bd03f5544b5845cde998ee526e5ddd5b51d
Signed-off-by: Karol Zmyslowski <karol.zmyslowski@3mdeb.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73934
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>
2023-04-21 15:22:21 +00:00
Elyes Haouas b68817d196 crossgcc: Upgrade CMake from version 3.26.2 to 3.26.3
Change-Id: Iab8d67632f97c596baa9b430228d4aae6fa48126
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74289
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
2023-04-17 23:43:12 +00:00
Bill XIE cd3545556e util/cbfstool: Qualify struct e820entry as packed
In order to accord with grub (see include/grub/i386/linux.h) and
comments for offsets of members of struct linux_params,
struct e820entry should be defined as __packed, otherwise,
sizeof(struct linux_params) will become 4224 (0x1080).

Fortunately, the affected area is usually not occupied.

Signed-off-by: Bill XIE <persmule@hardenedlinux.org>
Change-Id: I09955c90e4eec337adca383e628a8821075381d6
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74270
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2023-04-16 14:04:32 +00:00
YH Lin d76beb8129 mb/google/rex: add variant gpio tables for variant creation
BUG=b:276818954
TEST=new_variant_fulltest.sh rex0
BRANCH=None

Signed-off-by: YH Lin <yueherngl@google.com>
Change-Id: Iebc098f8d480ac3e1835b00861fd844d97f281a8
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74257
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
2023-04-13 17:40:26 +00:00
Julius Werner ea4d4c9c33 cbfstool: Add comment to define stability rules for cbfstool print -k
In CB:41119, I sort of made up a mechanism on the fly for how to make
the machine-parseable cbfstool print output extensible without breaking
backwards compatibility for older scripts. But I only explained it in
the commit message which is not very visible. This patch adds a comment
to the function that generates that output so that people who want to
change it can understand the intent.

Signed-off-by: Julius Werner <jwerner@chromium.org>
Change-Id: I0d18d59e7fe407eb34710d6a583cfae667723eb7
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74347
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
2023-04-13 00:43:23 +00:00
Arthur Heymans e84b095d3a util/sconfig: Remove unused ioapic and irq keywords
Ioapic information in the devicetree was only used to set up mptables
but this generic driver was removed (ca5a793 drivers/generic/ioapic:
Drop poor implementation).

This removes the unused remainders from mainboard devicetrees.
Remove ioapic setup from sconfig.

Change-Id: Ib3fef0bf923ab3f02f3aeed2e55cf662a3dc3a1b
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71789
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
2023-04-11 16:23:28 +00:00
Elyes Haouas af93336da3 ec/lenovo/pmh7/chip.h: Use 'bool' instead of 'int'
This to fix following error using Clang-16.0.0:
/cb-build/coreboot-toolchain.0/clang/LENOVO_W500/mainboard/lenovo/t400/static.c:135:22: error: implicit truncation from 'int' to a one-bit wide bit-field changes value from 1 to -1 [-Werror,-Wsingle-bit-bitfield-constant-conversion]
        .backlight_enable = 0x01,
                            ^~~~
/cb-build/coreboot-toolchain.0/clang/LENOVO_W500/mainboard/lenovo/t400/static.c:136:23: error: implicit truncation from 'int' to a one-bit wide bit-field changes value from 1 to -1 [-Werror,-Wsingle-bit-bitfield-constant-conversion]
        .dock_event_enable = 0x01,
                             ^~~~

Change-Id: Icd35224877fee355e1bbb8a8e838cb047604babb
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73810
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
2023-04-08 03:36:07 +00:00
Arthur Heymans fd4e676bb3 Revert "cbfstool/default-x86.fmd: Rename BIOS -> SI_BIOS"
This reverts commit 89b4f69746.

SI_BIOS is mostly used to indicate the BIOS region in Intel IFD. Not all
platforms are Intel platforms with an IFD, so revert this change. Also
tooling often depends on names not changing so renaming things should
not be done lightly. The default region should also be in sync with
non-x86 and made systematic across the tree.

Change-Id: I46f52494498295ba5e2a23d0b66b56f266293050
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74290
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Maximilian Brune <maximilian.brune@9elements.com>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
2023-04-07 15:14:04 +00:00
Felix Singer 74b4bd0e92 tree: Replace `egrep` with `grep -E`
For compatibility reasons, egrep is just a wrapper around grep today.
Thus, replace it with `grep -E`.

Change-Id: Ief08a22e4cd7211a3fee278492c95d37f9e058fa
Signed-off-by: Felix Singer <felix.singer@secunet.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74171
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
2023-04-06 19:54:44 +00:00
Arthur Heymans 5196aacb98 util/lint/stable-017: Update full config pattern matching
CONFIG_ARCH gives false positives for CONFIG_ARCH_X86_64_PGTBL_LOC so
use a different string: 'CONFIG_MAINBOARD_DIR'.

Change-Id: Ie5d4fc4693bc303afb16884c53c9ca4d1778a5cb
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74220
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Maximilian Brune <maximilian.brune@9elements.com>
2023-04-06 15:11:44 +00:00
Karthikeyan Ramasubramanian 9e45e32420 util/spd_tools: Add support for Phoenix platform
Update spd_gen and part_id_gen utilities to accommodate Phoenix platform
so that SPD can be generated for the memory parts used in that platform.
SPD requirements for Phoenix and Mendocino platforms are identical.

BUG=b:273383819
TEST=Run spd_gen and ensure that both Mendocino and Phoenix platforms
share the platform manifest for LP5 memory parts.

Change-Id: I7a12f73065864f08db8922c1a69eb503865a25b1
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74125
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jon Murphy <jpmurphy@google.com>
2023-04-05 10:01:15 +00:00
Felix Singer 3a5507fd31 util/crossgcc/buildgcc: Allow bootstrapping CMake with multiple threads
The main build process already runs multi-threaded, when requested.
Apply the same setting to the bootstrap / configure step.

Change-Id: I89d6728a0985946b702f83770bedf767afb12690
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74156
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-04-03 13:22:21 +00:00
Elyes Haouas 3453c313ac crossgcc: Upgrade CMake from version 3.25.2 to 3.26.2
Change-Id: I62078257fd84a64c699a7f930bc306e38d2f4058
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73791
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-04-02 02:28:09 +00:00
Felix Singer 0686c69802 util/crossgcc: Update binutils from 2.37 to 2.40
Change-Id: I34a20a999f7ea624c1add4750fcd116166953dd8
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66920
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
2023-04-01 20:17:39 +00:00
Felix Singer 0fb774024d util/docker/coreboot-sdk: Remove Python 2 package
Debian removed Python 2 from their Sid repository and so it needs to be
removed from the Dockerfile as well.

Built and tested the Dockerfile with Python 2 removed. Still works.

Change-Id: If4e298dc275c1dfaf57cd4c3f8e5f89410318ec0
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71711
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
2023-04-01 11:01:07 +00:00