The initial timestamps are now pushed on the stack when entering the
romstage C code.
Tested on Asus P5QC.
Change-Id: I88e972caafff5c53d8e68e85415f920c7341b92d
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/30670
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Field 'OEMID' & "OEM Table ID" are related to DSDT table
not to mainboard.
So use macro to set them respectvely to "COREv4" and
"COREBOOT".
Change-Id: I060e07a730e721df4a86128ee89bfe168c69f31e
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/29790
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: David Guckian
DSDT revision is =1 for ACPI v1 and =2 for greater ACPI version.
This will cause the AML interpreter to use 32-bit integers and math
if the version is 1, and 64-bit if the version is >=2.
Current spec version is 2 for ACPI 6.2-a.
Change-Id: I77372882d5c77b7ed52dcdd88028403df6f6fa7f
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/29626
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Working:
- SATA on southbridge ports
- SATA on Marvell IDE controller ports
- USB
- COM1
- PS/2 keyboard
- DDR2 DIMMs
- PCIe x16 PEG port
- PCIe x1 ports
- PCI ports
- NIC (MAC address needs to be set in Kconfig or in a CBFS file)
- S3 resume
- Green audio line out connector (the rest is untested)
Not working:
- Floppy port. Does not seem to be mainboard-specific, though.
Untested:
- EHCI debug
TODO:
- Add documentation
Change-Id: I6ed434a691e8ef2a61e0acb1f986a59b8e1ad818
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/25691
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Even though these two mainboards use the same gpio.c file, other boards
such as the p5ql_pro do not.
Change-Id: I2f7c8c12cb1bdcf47f3b4d4cef0b11e44a5b8863
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/29447
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
There are some small mistakes in these recently-added mainboards:
- board_info.txt: Lists board socket incorrectly.
- cmos.default: Loglevel was decreased some time ago.
- devicetree.cb: Spelling mistake.
- Kconfig: Mainboard name does not have a hyphen.
Change-Id: I08d9b06e79683acd3994b84647bce401ed6741e2
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/29446
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Nico Huber <nico.h@gmx.de>
This mainboard is quite similar to the p5qc. The main differences being a second
PEG slot, the IDE slot and being DDR2 only.
The following was tested:
- both PEG slots populated (coreboot sets legacy VGA decoding on the GPU in the
black slot)
- USB
- Ethernet NIC
- PS2 Keyboard
- COM1
- S3 resume
Change-Id: I49a4bca4256e2a905aff3252eca76387c81152c1
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/29102
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
A shortcoming of this driver is that if multiple devices with the same PCI ID
are present and don't have an eeprom, they would all get the same macadress set.
The r8168 driver deals with such cases so it should be easy to implement if
needed.
Change-Id: I5c32df00e25453c350a45e7f1ee6834b89c4289f
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/28265
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
SeaBIOS does not seem to like the Marvel IDE controller, so disabled SeaBIOS
support for ATA. It works fine in Linux afterwards.
Working:
- SATA on southbridge port
- SATA on marvel IDE controller ports (only in Linux)
- USB
- COM1
- PS2 Keyboard
- DDR2 DIMMs
- PCIe x16 PEG port
- PCI port
- NIC (needs a driver to set macaddress)
- S3 resume
Not working:
- SeaBIOS with ATA support (long timeout marvel controller so disabled)
- DDR3 fails because the proper clock signal does not get enabled. Even when
fixing this it fails later or during memtest, so it should be considered
unsupported for now
Untested:
- PCIe x1 ports (expected to work)
- sound (expected to work)
TODO:
add documentation
Change-Id: I4a81940707566776bd048904ca1387fea741fece
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/28264
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
