Commit Graph

914 Commits

Author SHA1 Message Date
Ioannis Barkas 3ba18a67eb Fix typo in Winbond W83977TF register listing.
Signed-off-by: Ioannis Barkas <tripl3fault@yahoo.com>
Signed-off-by: Nikos Barkas <levelwol@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4356 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-12 14:20:27 +00:00
Ronald G. Minnich 6ce41c06cc This is transition code for cbfs to implement
cbfs files at fixed addresses.

I call this transitional as the approach I am taking is to add
capability to cbfstool but not change code in a way that will break
existing usages. Later, once we're sure nothing has broken, we can start to 
smooth the edges. 

Right now, fixed address file are only supported via the add command. 

There is one additional command syntax, so, example:
cbfstool add rom romstrap optionrom 0xffffd000

Will add the file to that fix location for a romstrap.

The assumption is that the ROM is based at the end of a 32-bit address
space. As you can see from the code, that assumption can easily be
over-ridden, if we ever need to, with a command option.

Here is one example output result.

rminnich@xcpu2:~/src/bios/coreboot-v2/util/cbfstool$ ./cbfstool x.cbf print
x.cbf: 1024 kB, bootblocksize 32768, romsize 1048576, offset 0x0
Alignment: 16 bytes

Name                           Offset     Type         Size
h                              0x0        optionrom   251
                             0x130      free         917120
h3                             0xdffe0    optionrom    251
                             0xe0110    free         97960

The way this is implemented is pretty simple. I introduce a new
operator, split, that splits an unallocated area into two unallocated
areas. Then, allocation merely becomes a matter of 0, 1, or 2 splits:
0 split -- the free area is the exact fit
1 splits -- need to split some off the front or back
2 splits -- need to split off BOTH the front and back

I think you'll be able to see what I've done. I call this transitional
because, in the end state, we only need one allocate function; for now
I've left two in, to make sure I don't break compatibilty.

Why I like this better than ldscript approach: I like having the
ROMSTRAP located by cbfs, not linker scripts. For one thing, it makes
romstrap visible as a first class object. I think I would have latched
onto a problem I was having much more quickly had I remembered the
ROMSTRAP. It gets lost in the linker scripts.

At this point, we should be able to start removing special ROMSTRAP location 
code from linker scripts. 

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4351 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-08 03:33:57 +00:00
Patrick Georgi 240ef7c769 Change the CBFS build process to use coreboot.rom
instead of coreboot.strip. That fixes the normal
image because the calculations for its offset in
the ROM match reality again.

This requires changes in CBFS configurations to
minimize the bootblock size. These are also done
for CBFS boards.

Other than this a couple of minor fixes are in this
patch:
- make asus/m2v-mx_se build with abuild with a
  crosscompiler
- move CONFIG_CBFS for hp/dl145_g3 to Options.lb
  as it's done everywhere else
- change the default config of abuild to not
  provide ROM_IMAGE_SIZE values for the images
  in a CBFS configuration
- change abuild's crosscompile autodetection to
  not try to use "i386-elf-i386-elf-gcc" (which
  is bogus)

Except for the latter two abuild changes (both
in util/abuild/abuild), they're available as
patch set on the mailing list in a mail from
2009-06-05 titled
[PATCH]es to get normal image to work again with CBFS

The changes in util/abuild/abuild are trivial and
abuild tested.

As discussed on the list,
targets/hp/dl145_g3/Config-abuild.lb is
deleted, now that Config.lb works again.

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4344 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-06 07:19:53 +00:00
Luc Verhaegen a9c5ea08d0 Revert "CMOS: Add set_option and rework get_option."
This reverts commit eb7bb49eb5b48c39baf7a256b7c74e23e3da5660.

Stepan pointed out that "s" means string, which makes the following statement
in this commit message invalid: "Since we either have reserved space (which
we shouldn't do anything with in these two functions), an enum or a
hexadecimal value, unsigned int seemed like the way to go."

Signed-off-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Luc Verhaegen <libv@skynet.be>

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4335 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-03 14:19:33 +00:00
Luc Verhaegen 9ceae905f1 CMOS: Add set_option and rework get_option.
To ease some of my debugging pain on the unichrome, i decided i needed to
move FB size selection into cmos, so i could test a size and then reset it
to the default after loading this value so that the next reboot uses the
(working) default again. This meant implementing set_option in parallel to
get_option.

get_option was then found to have inversed argument ordering (like outb) and
passing char * and then depending on the cmos layout length, which made me
feel quite uncomfortable. Since we either have reserved space (which we
shouldn't do anything with in these two functions), an enum or a
hexadecimal value, unsigned int seemed like the way to go. So all users of
get_option now have their arguments inversed and switched from using ints
to unsigned ints now.

The way get_cmos_value was implemented forced us to not overlap byte and to
have multibyte values be byte aligned. This logic is now adapted to do a
full uint32_t read (when needed) at any offset and any length up to 32, and
the shifting all happens inside an uint32_t as well. set_cmos_value was
implemented similarly. Both routines have been extensively tested in a
quick separate little program as it is not easy to get this stuff right.

build_opt_tbl.c was altered to function correctly within these new
parameters. The enum value retrieval has been changed strol(..., NULL, 10)
to stroul(..., NULL, 0), so that we not only are able to use unsigned ints
now but so that we also interprete hex values correctly. The 32bit limit
gets imposed on all entries not marked reserved, an unused "user_data" field
that appeared in a lot of cmos.layouts has been changed to reserved as well.

Signed-off-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Peter Stuge <peter@stuge.se>

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4332 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-03 10:47:19 +00:00
Uwe Hermann f8318fe8f9 More compact format for wiki output at
http://www.coreboot.org/Coreboot_Options (trivial).

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4330 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-02 23:49:00 +00:00
Patrick Georgi c7a6447c8f cbfstool reacts to a too large bootblock file by stopping
with an error code now.

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4329 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-06-01 20:02:21 +00:00
Patrick Georgi a034dca42c Move coreboot_ram and coreboot_apc to CBFS. This allows to
reduce the size of the bootblock (done for kontron/986lcd-m)

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4315 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-27 14:19:31 +00:00
Luc Verhaegen e6e899dde9 util/vgabios: build/warning fixes.
Signed-off-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Stefan Reinauer <stepan@coresystems.de>

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4312 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-27 11:39:16 +00:00
Patrick Georgi a84a99b994 Various fixes to the tree to get coreboot-v2 to build on Solaris
- Replace $(PWD) with $(CURDIR) in Makefiles. I don't know why
  the Solaris version behaves differently, but CURDIR is a safe
  choice on gnu make (and we require gnu make already)
- Use tail -1 instead of tail -n1 in a file that already relies on
  tail -1 support in another place
- Use tail -1 as alternative to tail -n1 in another place
- Use #define for ulong_t in romcc, as that name is used on Solaris
- Avoid fprinting a null pointer. The standard doesn't mandate that
  this is a special case, and Solaris doesn't implement it that way.

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4305 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-26 14:03:51 +00:00
Stefan Reinauer 3a5c27763f Cosmetic cbfstool update (trivial)
* remove some dead code
* fix indentation
* comment in some destructors and fix some other warnings 
* use HOSTCC instead of CC (not all the way cosmetic, but very simple)

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4299 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-26 12:22:10 +00:00
Uwe Hermann 5e445c5fee Make the getpir output look less crappy and add a license
header template, as people keep forgetting them.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4296 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-22 18:17:06 +00:00
Ronald G. Minnich 56ae8fcb6f This patch implements a "flash friendly" value for initialized areas of flash.
It makes the write part of flashrom dramatically faster with small
payloads like filo; and it also eliminates unnecessary wear on flash
by not writing zeros (it's unlikely this really matters; let me know 
next time you flash a BIOS flash 100,000 times!). 

More importantly, it allows for future partial flash upgrades with cbfs. 

Note that uninitialized_flash_value is a global that can, if we ever need it, 
be set by an argument in main. Assuming we ever see a flash where the 
"erased" value is 0, not 0xff. 

At the same time, "erased" value has been "1" on every EEPROM or 
FLASH I've used for some time now. 

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>




git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4290 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-16 23:05:20 +00:00
Ward Vandewege 67befdc22b The cbfstool print command should pretty-print the type of components that are
type 'deleted'.

Signed-off-by: Ward Vandewege <ward@gnu.org>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4284 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-14 03:00:15 +00:00
Ward Vandewege df042a18ec This patch fixes a segfault when a file too large to fit is added to a rom
image.

Signed-off-by: Ward Vandewege <ward@gnu.org>
Acked-by: Myles Watson <mylesgw@gmail.com>




git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4283 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-13 20:11:04 +00:00
Ward Vandewege a064b5239d Add support for human-friendly component string types for the cbfstool add
command.

Make use of it in config.g (Myles)

Signed-off-by: Ward Vandewege <ward@gnu.org>
Acked-by: Myles Watson <mylesgw@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4282 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-13 20:08:28 +00:00
Myles Watsonmylesgw 4b35354d39 Remove a shadowed variable and an unnecessary local variable in cbfstool/fs.c.
It is nearly trivial.

Signed-off-by: Myles Watson<mylesgw@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4279 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-13 02:48:58 +00:00
Ronald G. Minnich 1c7cf64f1e This fixes a rather silly bug in cbfs with filenames > 16 characters.
Tested to booting linux with qemu. 
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Myles Watson<mylesgw@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4276 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-12 15:06:54 +00:00
Ronald G. Minnich 442fc92b1f I would have liked to get an ack, but the error this corrects is pretty
critical, since unless it is fixed this tool creates empty tables that cause
coreboot to (in some cases, e.g. on qemu) triple fault and die. 

For the record, an empty option_table is not allowed. The table must, 
at least, have 3 32-bit entries in this order: 
type -- should be 200, 0r 0xc8, i.e. 0xc8, 0, 0, 0
size of table in LE order, 4 bytes
size of header in LE order, which is always 12,0,0,0

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4264 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-09 17:14:58 +00:00
Myles Watson b534e42565 Trivial clean up of print usage and parameter checking.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Myles Watson <mylesgw@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4263 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-08 20:07:00 +00:00
Myles Watson 475aeda9d6 Add -Werror to help us keep the code clean.
Change sizes from unsigned int to int.
Clean up some usage and parameter checking.

Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4262 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-08 19:39:15 +00:00
Ronald G. Minnich 83b8f0c485 I have made a very simple mod to cbfstool that is compatible with the
src/lib/ code in coreboot. I.e. the tool changes but the coreboot code
does not.

Currently, as cbfstool manages the ROM, there are files and empty
space. To allocate files, the code does, first, a walk of the headers
and, if that fails, does a brute-force search of the rest of the
space.

We all agree that the brute-force search has lots of problems from a
performance and correctness standpoint.

I've made a slight change. Instead of an "empty space" area with no
valid headers, I've made a header for the empty space.

So cbfs creation looks like this:
- set up the boot block
- create a file, of type CBFS_COMPONENT_NULL, that contains the empty
space. CBFS_COMPONENT_NULL was already defined in cbfs.h

Here's an example:

[rminnich@xcpu2 cbfstool]$ ./cbfstool testcbfs create 1048576 2048
(cbfstool) E: Unable to open (null): Bad address
[rminnich@xcpu2 cbfstool]$ ./cbfstool testcbfs print
testcbfs: 1024 kB, bootblocksize 2048, romsize 1048576, offset 0x0
Alignment: 16 bytes

Name                           Offset     Type         Size
                              0x0        0xffffffff   1046456

So how do we create a new file?

It's easy: walk the files and find a file of type CBFS_COMPONENT_NULL,
which is as large
or larger than the file you are trying to create. Then you use that file.
- if the file is the same size as the NULL file, then it's easy: take it
- if the file is smaller than the NULL file, you split the NULL file
into two parts.

note that this works in the base case: the base case is that the whole
storage is CBFS_COMPONENT_NULL.

Here's an example of adding a file.
[rminnich@xcpu2 cbfstool]$ ./cbfstool testcbfs add-stage testfixed t
[rminnich@xcpu2 cbfstool]$ ./cbfstool testcbfs print
testcbfs: 1024 kB, bootblocksize 2048, romsize 1048576, offset 0x0
Alignment: 16 bytes

Name                           Offset     Type         Size
t                              0x0        stage        23176
                              0x5ab0     0xffffffff   1023240

Note that the NULL split and got smaller. But the entire ROM is still
contained by the two files. To walk this entire rom will require two
FLASH accesses.

Add another file:
[rminnich@xcpu2 cbfstool]$ ./cbfstool testcbfs add-stage testfixed tt
[rminnich@xcpu2 cbfstool]$ ./cbfstool testcbfs print
testcbfs: 1024 kB, bootblocksize 2048, romsize 1048576, offset 0x0
Alignment: 16 bytes

Name                           Offset     Type         Size
t                              0x0        stage        23176
tt                             0x5ab0     stage        23176
                              0xb560     0xffffffff   1000024
[rminnich@xcpu2 cbfstool]$

So, taking current ROMs as an example, I can reduce FLASH accesses for
cbfs from (potentially) thousands to (typically) less than 10.

Index: fs.c
Changes for readability and cleanliness. Move common blobs of code to functions. 
New function: rom_alloc,which allocates files by finding NULL files and using/splitting. 
Other changes as needed to support this usage. 
Index: util.c
Creating a cbfs archive now requires creation of a NULL file covering the file system space. 
Index: cbfs.h
Add a DELETED file type with value 0. Any file can be marked deleted by zero its type; this is a 
FLASH-friendly definition for all known FLASH types. 

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>

I think it is a step in the right direction.  Could you add the
function prototype to cbfstool.h?

Acked-by: Myles Watson <mylesgw@gmail.com>
(I added the prototype)




git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4261 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-08 19:23:00 +00:00
Uwe Hermann 2ac37ca113 Fix my last commit. I looked at the wrong dead laptop.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4256 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-07 00:21:02 +00:00
Uwe Hermann 0dae44c71f Support for detecting the SMSC FDC37N869 (trivial).
No datasheet available, chip identified by probing and looking at the PCB.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4255 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-07 00:03:18 +00:00
Myles Watson f95b49eeb8 This patch removes these warnings:
Makefile:435: warning: overriding commands for target `src/lib/memset.o'

And replaces these debug messages:
partobj dir 0 parent <__main__.partobj instance at 0x7f1e846a7ab8>
part pci_domain
with:
partobj dir 0 parent northbridge_amd_amdk8_root_complex_dev2 part pci_domain

Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4253 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-04 20:27:09 +00:00
Stefan Reinauer 88e71e8859 Run dos2unix on all files:
find . -type f| grep -v svn | xargs dos2unix

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4250 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-05-02 12:42:30 +00:00
Myles Watson fa12b67771 Remove warnings from compilation of the s2892 with and without CBFS.
I didn't try to remove "defined but not used" warnings because there are too
many ifdefs to be sure I wouldn't break something.

For shadowed variable declarations I renamed the inner-most variable.  

The one in src/pc80/keyboard.c might need help.  I didn't change the
functionality but it looks like a bug.

I boot tested it on s2892 and abuild tested it.

Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4240 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-30 22:45:41 +00:00
Patrick Georgi 6388d49143 Flashrom is now moved over to its own repository.
Add a note to the coreboot-v2 version of the tree that
contains the new location.

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4215 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-26 18:17:40 +00:00
Patrick Georgi 79cba771fc Trivial: allow "," in filenames
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4213 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-26 07:15:19 +00:00
Stephan Guilloux baa4374cad The flashrom makefile wants to redirect both stdout and stderr to
/dev/null for one compile test.
The old variant of using &>/dev/null works on bash and zsh, but not on
dash and tcsh. dash and tcsh interpret it as "background command and
truncate /dev/null" which is not what we want. >& works on tcsh and
bash, but it is not POSIX compliant.
Since make uses /bin/sh and /bin/sh has to be POSIX compliant, we can
use the POSIX variant of stderr and stdout redirection.

>/dev/null 2>&1
is POSIX compliant. This is specified in SuSv3, Shell Command Language,
sections 2.7.2 and 2.7.6.

Signed-off-by: Stephan Guilloux <stephan.guilloux@free.fr>
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ward Vandewege <ward@gnu.org>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4211 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-25 22:07:28 +00:00
Myles Watson 72631a01fa The master cbfs record was located at the end of the flash and overwrote
anything that was there.  For ck804 or mcp55-based machines that was the
romstrap.

The fix is simple:
1. Put the master cbfs record above the bootblock instead of on it.

Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4209 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-25 12:39:04 +00:00
Patrick Georgi fe62016512 Enable cbfs payload compression (the "l" flag) if payloads are
supposed to be compressed (with lzma only, as cbfstool lacks
nrv2b compression support for now)

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4208 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-25 07:33:25 +00:00
Uwe Hermann a5de85cb86 MAX may already be defined. Also, fix smaller cosmetics (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4205 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-24 16:17:41 +00:00
Stephan Guilloux 6a30a5f891 flashrom: Support MX25L3235D
Signed-off-by: Stephan Guilloux <stephan.guilloux@free.fr>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4200 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-23 22:51:56 +00:00
Uwe Hermann 424638e7bb Add 'install' target for ectool (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4199 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-23 22:22:47 +00:00
Myles Watson 06db2c4482 Fix an uninitialized variable. If it didn't end up being zero it sometimes
caused a seg fault, sometimes executed somewhere else.  Also add an error if
the algorithm is unknown.

Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Ward Vandewege <ward@gnu.org>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4198 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-23 18:46:32 +00:00
Myles Watson 436b9de0a3 This patch cleans up Makefile generation. It removes the
coreboot.romfs file since CBFS will eventually be the standard.

Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4197 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-23 17:01:37 +00:00
Uwe Hermann a44228c435 Don't duplicate option description in README, the manpage already has
that info. Also, additional small cosmetic fix.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4196 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-23 14:57:55 +00:00
Stefan Reinauer 476053356b Instead of just
coreboot-v2 $ util/abuild/abuild -t kontron/986lcd-m $PWD

you can now also say 

  coreboot-v2 $ util/abuild/abuild -t kontron/986lcd-m/Config-myconf.lb $PWD

and instead of using Config-abuild.lb or creating a temporary Config-abuild.lb,
abuild will use the existing Config-myconf.lb to build your image. 

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>




git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4192 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-22 23:39:19 +00:00
Stefan Reinauer f182456013 mini fix to reliably compile inteltool on darwin, and on Linux both on x86/x86_64.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4190 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-22 23:17:44 +00:00
Myles Watson 6315274cc8 This patch fixes the parser. '|' has special meaning so [|] is used.
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4187 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-22 22:25:45 +00:00
Carl-Daniel Hailfinger e5b44ab4dc All "unknown xy SPI chip" entries claim to have status UNTESTED for
probe/read/erase/write. That is incorrect.

A bit of confusion comes from how the #defines are named. We call them
TEST_BAD_*, but the message printed by flashrom says:
"This flash part has status NOT WORKING for operations:"

Something that is unimplemented is definitely not working.

Neither of the chip entries mentioned above has erase or write functions
implemented, so erase and write are not working.
Since their size is unknown, we can't read them in. That means read is
not working as well.
Probing is a different matter. If a chip-specific probe function had
matched, we wouldn't have to handle the chip with the "unknown xy SPI
chip" fallback. I'm tempted to call that "not working" as well, but I'm
open to discussion on this point.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4177 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-22 13:33:43 +00:00
Uwe Hermann 257ae3f520 Quick 'indent' run on ectool with some additional manual cosmetic fixes.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4174 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-22 12:28:14 +00:00
Stefan Reinauer 0408bdd240 don't ignore return values (trivial)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4173 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-22 12:14:39 +00:00
Stefan Reinauer 73d5daaf97 * Allow coreboot to use the full 256 bytes of CMOS memory
* Make functions out of the accessor macros in mc146818rtc.c
* don't hide reserved cmos entries from coreboot, only from the user.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4170 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-22 09:03:08 +00:00
Patrick Georgi 18d7320d17 Remove the requirement for payload.sh files to be executable. This
helps if the file is generated from patches, esp. if that happens
often (eg. with quilt)

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4165 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-22 08:10:48 +00:00
Stefan Reinauer b5ab323a40 A small utility to dump the RAM of a laptop's Embedded/Environmental
Controller. Nothing fancy, does not know any laptops, EC types, or what
the values mean. It just dumps them. For the dump method, have a look at
the ACPI 3.0b spec.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4163 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-22 07:23:00 +00:00
Carl-Daniel Hailfinger c6236edd47 flashrom: Add support for Gigabyte GA-MA790FX-DQ6. This board uses
IT8718F LPC->SPI translation for the flash chip.

Tested by Mateusz Murawski.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Mateusz Murawski <matowy@tlen.pl>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4161 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-21 23:03:20 +00:00
Patrick Georgi 2d3e712d56 Add an "-l <num>" argument to abuild that sets the LOGLEVEL variables
to the specified value.

Only change Config-abuild.lb, as the others are for manual buildtarget
use - adding __LOGLEVEL__ there would kill the build as it isn't
replaced by the actual content.

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4153 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-21 20:31:18 +00:00
Patrick Georgi 16cdbb244c Eliminate various issues brought up by scan-build.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4152 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-21 20:14:31 +00:00