Commit Graph

3225 Commits

Author SHA1 Message Date
Rudolf Marek 15bf50d820 Following patch adds resume (exit from self refresh) support for AMD K8 revF
CPUs. It handles both type of erratas on those CPUs.

Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4102 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-13 18:34:35 +00:00
Rudolf Marek 33cafe5bfb Following patch implements ACPI resume support for coreboot. The hardware main
hook will come in separate patch perhaps.

Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4101 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-13 18:07:02 +00:00
Rudolf Marek 497c8effce Following patch adds support for resume on VT8237 based motherboards. The NB
part of this patch adds support for resume well NVRAM. In which DQS values are
stored.

Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4100 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-13 18:00:09 +00:00
Rudolf Marek a572f83e71 Following patch adds necessary hooks and as well the compile time checks for
ACPI suspend/resume.

The memory cleared now is just the coreboot memory not the low memory.

Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4099 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-13 17:57:44 +00:00
Carl-Daniel Hailfinger 3f04dade05 Fix the following errors:
In file included from
src/mainboard/asus/a8v-e_se/cache_as_ram_auto.c:93:
src/northbridge/amd/amdk8/raminit.c: In function ‘sdram_set_spd_registers’:
src/northbridge/amd/amdk8/raminit.c:2123: error: implicit declaration of
function ‘activate_spd_rom’

In file included from
src/mainboard/asus/a8v-e_se/cache_as_ram_auto.c:101:
src/cpu/amd/model_fxx/init_cpus.c: In function ‘init_cpus’:
src/cpu/amd/model_fxx/init_cpus.c:319: error: implicit declaration of
function ‘soft_reset’

In file included from
src/mainboard/asus/m2v-mx_se/cache_as_ram_auto.c:98:
src/northbridge/amd/amdk8/raminit_f.c: In function ‘sdram_set_spd_registers’:
src/northbridge/amd/amdk8/raminit_f.c:2848: error: implicit declaration of
function ‘activate_spd_rom’

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4098 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-13 16:21:16 +00:00
Carl-Daniel Hailfinger 6dcbe7f540 This patch cleans up the calls to $CC in mainboard Config.lb files. They
now all have the same parameter order.

action "$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS)
-I$(TOP)/src -I. -nostdinc -nostdlib -fno-builtin -Wall -Os -c -S
$(MAINBOARD)/$(CACHE_AS_RAM_AUTO_C) -o $@"

The idea behind this parameter order is:
- *FLAGS at the beginning.
- Use a common set of *FLAGS.
- Include files and directories listed afterwards.
- nostdinc, nostdlib, no-builtin tell the compiler this is standalone
  code.
- Warnings. They do not influence source or compilation.
- Compilation strategy (small) and output mode (asm or binary).
- File to be compiled.
- Output name.
- $(DEBUG_CFLAGS) and -S are only used for asm output.


Other changes in this patch:

- src/supermicro/h8dme/Config.lb now uses $DEBUG_CFLAGS instead of
hardcoding the respective flags.

- $DEBUG_CFLAGS was added to asm outputting $CC calls:
supermicro/h8dme/Config.lb
lippert/roadrunner-lx/Config.lb

- $DISTRO_CFLAGS was added to some $CC calls in:
iwill/dk8_htx/Config.lb (CAR AP code)
supermicro/h8dmr/Config.lb (CAR AP code)
supermicro/h8dme/Config.lb (CAR AP code)
gigabyte/m57sli/Config.lb (CAR AP code)
gigabyte/ga_2761gxdk/Config.lb (CAR AP code)
amd/serengeti_cheetah_fam10/Config.lb (everywhere)
msi/ms7135/Config.lb (everywhere)
nvidia/l1_2pvv/Config.lb (CAR AP code)
-$CFLAGS was added to all $CC calls in:
amd/db800/Config.lb
amd/dbm690t/Config.lb
amd/norwich/Config.lb
amd/pistachio/Config.lb
amd/serengeti_cheetah/Config.lb
amd/serengeti_cheetah_fam10/Config.lb
arima/hdama/Config.lb
artecgroup/dbe61/Config.lb
asus/a8n_e/Config.lb
asus/a8v-e_se/Config.lb
asus/m2v-mx_se/Config.lb
broadcom/blast/Config.lb
digitallogic/msm800sev/Config.lb
gigabyte/ga_2761gxdk/Config.lb
gigabyte/m57sli/Config.lb
ibm/e325/Config.lb
ibm/e326/Config.lb
iei/pcisa-lx-800-r10/Config.lb
iwill/dk8_htx/Config.lb
iwill/dk8s2/Config.lb
iwill/dk8x/Config.lb
kontron/986lcd-m/Config.lb
lippert/roadrunner-lx/Config.lb
lippert/spacerunner-lx/Config.lb
msi/ms7135/Config.lb
msi/ms7260/Config.lb
msi/ms9185/Config.lb
msi/ms9282/Config.lb
newisys/khepri/Config.lb
nvidia/l1_2pvv/Config.lb
pcengines/alix1c/Config.lb
sunw/ultra40/Config.lb
supermicro/h8dme/Config.lb
supermicro/h8dmr/Config.lb
technexion/tim8690/Config.lb
tyan/s2735/Config.lb
tyan/s2850/Config.lb
tyan/s2875/Config.lb
tyan/s2880/Config.lb
tyan/s2881/Config.lb
tyan/s2882/Config.lb
tyan/s2885/Config.lb
tyan/s2891/Config.lb
tyan/s2892/Config.lb
tyan/s2895/Config.lb
tyan/s2912/Config.lb
tyan/s2912_fam10/Config.lb
tyan/s4880/Config.lb
tyan/s4882/Config.lb

- Use $@ wherever appropriate.

- Kill that evil CACHE_AS_RAM_AUTO_C variable.

- Trailing whitespace fixups on lines which were touched anyway.

We now only have 6 remaining different calls to $CC whereas before there
were 20.
If I am allowed to rename src/mainboard/kontron/986lcd-m/auto.c to
src/mainboard/kontron/986lcd-m/cache_as_ram_auto.c, we're down to 4
different calls.
If we can decide on the use of $CPU_OPT, we are down to 3 different
calls.

One additional point I'd like to clear up:
if ASSEMBLER_DEBUG
makedefine DEBUG_CFLAGS := -g -dA -fverbose-asm
end

"-dA -fverbose-asm" is only useful for asm output. For these flags,
DEBUG_CFLAGS is a total misnomer. What about calling them
DEBUG_ASMCFLAGS or somesuch?
"-g" should be controllable by a separate switch. It is useful even for
object code.


The following targets are broken by this patch because they contain
implicit declarations, but the error did not trigger due to missing
CFLAGS:
amd/serengeti_cheetah
asus/a8v-e_se
asus/m2v-mx_se
digitallogic/msm800sev
pcengines/alix1c
supermicro/h8dme
supermicro/h8dmr


Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4097 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-12 21:47:09 +00:00
Rudolf Marek e86c65b62e The IT8712F needs to have the configuration bits changed to handle the power for
memory correctly during suspend.s

Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Peter Stuge <peter@stuge.se>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4096 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-12 18:01:55 +00:00
Carl-Daniel Hailfinger 7845fb59a2 Bring S2912 and S2912_Fam10 Config.lb in line with each other.
- Use $(CACHE_AS_RAM_AUTO_C) instead of cache_as_ram_auto.c
- Compile apc_auto.c with $(DISTRO_CFLAGS)
- Clean up whitespace

If anyone can explain the remaining differences in Config.lb which are
NOT caused by the K8/Fam10 switch, I'd be glad to hear them.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4095 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-11 18:58:17 +00:00
Ward Vandewege a3ec56c17a This patch fixes an edge case for K8 raminit. Specifically, it brings the code
in line with the K10 code.

I was trying to use DDR2 800 (CL6) memory on an m57sli, but booting failed.
Marc Jones found this bug (thanks!), which fixes booting with this specific
memory. For the record, it was Crucial CT2KIT25664AA800.

I put the machine through a few days of use. It also succesfully passed a run
of http://people.redhat.com/dledford/memtest.shtml:

  $ ./memtest
  TEST_DIR:               /tmp
  SOURCE_FILE:            linux-2.6.29.1.tar.bz2
  NR_PASSES:              20
  MEGS_PER_COPY:          270
  NR_COPIES:              45
  PARALLEL:               no
  COMPRESS_RATIO:         5
  COMPRESS_FLAG:          j
  COMPRESS_PROG:          /bin/bzip2
  EXTRACT:                yes

  Creating comparison source...done.
  Starting test pass #1: unpacking, comparing, removing, done.
  Starting test pass #2: unpacking, comparing, removing, done.
  Starting test pass #3: unpacking, comparing, removing, done.
  Starting test pass #4: unpacking, comparing, removing, done.
  Starting test pass #5: unpacking, comparing, removing, done.
  Starting test pass #6: unpacking, comparing, removing, done.
  Starting test pass #7: unpacking, comparing, removing, done.
  Starting test pass #8: unpacking, comparing, removing, done.
  Starting test pass #9: unpacking, comparing, removing, done.
  Starting test pass #10: unpacking, comparing, removing, done.
  Starting test pass #11: unpacking, comparing, removing, done.
  Starting test pass #12: unpacking, comparing, removing, done.
  Starting test pass #13: unpacking, comparing, removing, done.
  Starting test pass #14: unpacking, comparing, removing, done.
  Starting test pass #15: unpacking, comparing, removing, done.
  Starting test pass #16: unpacking, comparing, removing, done.
  Starting test pass #17: unpacking, comparing, removing, done.
  Starting test pass #18: unpacking, comparing, removing, done.
  Starting test pass #19: unpacking, comparing, removing, done.
  Starting test pass #20: unpacking, comparing, removing, done.

Signed-off-by: Ward Vandewege <ward@gnu.org>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4094 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-11 18:09:03 +00:00
Carl-Daniel Hailfinger ebdc7c7cfe Kill remaining unneeded CAR/ROMCC if-blocks.
Lots of Config.lb files still have "if USE_DCACHE_RAM" sections although
USE_DCACHE_RAM is always set for them. Such checks are not only
pointless, they actively make the files hard to read.

A full abuild run confirmed that compilation did not change with this
patch applied.

The patch does not change whitespace of the remaining code to ease
review and svn blame.

With this change, it should be possible to have two or three Config.lb
variants in total (except the actual hardware config). Right now, some
Config.lb have comments, some don't, some have empty lines for better
readability, some don't, some have leading whitespace, some don't. This
is an utter mess and unifying these files would certainly reduce the
headaches I have when looking at them.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4093 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-11 14:51:49 +00:00
Uwe Hermann 4eb37059ce Mention a few more flash chip packages in README/manpage.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4092 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-11 13:59:00 +00:00
Stefan Reinauer 1da9a79a06 move architecture override before cross compiler detection, or the Sandpoint
skeleton will have get a cross compiler before it gets the architecture set 
to SKIP. Pretty much build system internal, so self-acked.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4091 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-10 23:02:48 +00:00
Uwe Hermann 708ccac6ee Add a note that 'modprobe msr' might be required.
Remove trailing whitespace. Fix typos.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4090 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-10 21:05:56 +00:00
Uwe Hermann cd2cbf7200 Fix typo.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4089 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-10 14:49:14 +00:00
Uwe Hermann a0eeef324f Various manpage / README fixes:
- Improve description a bit, especially wrt chip packages and
   protocols.

 - Add some missing parameters to manpage option descriptions.

 - Remove long obsolete DoC support note.

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4088 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-10 14:41:29 +00:00
Stefan Reinauer 8d9f932f2a unify spd_ddr2.h (trivial)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4087 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-10 12:27:42 +00:00
Mondrian nuessle 712f325237 Fixed the typo should indeed be a 0x2e.
Tested on an iWILL DK8-HTX board.

Signed-off-by: Mondrian nuessle <nuessle@uni-hd.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4086 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-09 14:28:36 +00:00
Stefan Reinauer 013c7cfab5 * commit previously forgotten romfs.txt
* fix a copy & paste error in src/lib/romfs.c

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4085 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-08 07:47:01 +00:00
Stefan Reinauer d367037997 fix sandpointx3_altimus_mpc7410 target. We're back at all boards compiling.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4084 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-08 07:21:52 +00:00
Stefan Reinauer d40f7db2d9 Only build romfs on those target that have CONFIG_ROMFS enabled.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4083 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-08 06:41:06 +00:00
Ronald G. Minnich 0de8b9111a This tested ok, but qemu can't really handle c0000 as RAM.
(trivial)

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4082 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-07 15:38:17 +00:00
Stefan Reinauer 80775c1425 add Config-abuild for the new board (trivial)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4081 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-07 14:27:38 +00:00
Ronald G. Minnich rminnich 4a8523a788 This is a bit of an emergency fix for qemu. Ethernet routing has not been
working. Given all the limitations of PIRQ routing we keep it simple
and just set the IRQ directly. Most BIOSes are doing setup this way anyways, 
since there are so many errors in PIRQ tables. 

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4080 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-07 02:18:13 +00:00
Ronald G. Minnich b3b7db777d This fixes a bug in romfs code; see comment. If we add the pci rom
to romfs for qemu,we get this: 
Check pci1013,00b8.rom
found it, @ fff99698, first word is e946aa55
In cbfs, rom address for PCI: 00:02.0 = 0
On mainboard, rom address for PCI: 00:02.0 = fff99698
copying VGA ROM Image from fff99698 to 0xc0000, 0x8c00 bytes

This is sort of OK, excpet that when it gets to payload time, the 
system explodes. I suspect that copy is kind of a problem. 

But this is a pretty important bug fix so in it goes. 

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4079 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-06 23:28:22 +00:00
Ronald G. Minnich 308312ce6c Some changes for option roms:
- don't make users pick the name. Names for option roms are in the v3-defined
format of pci%04x,%04x.rom with the vendor and device id filling in the 
%04x. 
- users pass in vendor and device id. 
- users pass in a dest. If the dest is 0, the address of the ROM image in 
FLASH is returned. If the address is non-zero, then the decmpressor is called,
and it will make sure the ROM image is copied to the destination (even 
in the uncompressed case).

move qemu over to always using ROMFS

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4078 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-06 20:38:34 +00:00
Ronald G. Minnich 662d52d244 Add support for romfs to option rom loading.
Pretty simple: Find the rom in the romfs, if found, set dev properties so 
that the rest of the code works.

At some point, we can remove some of the other code, i.e. the first else, 
and stop requiring people to do math.

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4077 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-06 16:03:53 +00:00
Stefan Reinauer df77f345e7 (trivial) fix some warnings
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4076 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-06 14:00:53 +00:00
Daniel Toussaint da6d92ba11 Daniel Toussaint wrote:
As I mentioned a few weeks ago, I am in the process of porting this board:

http://www.technexion.com/products/embedded_boards/tim-8690-mt.html

This board has a dual BIOS , choosable with a jumper - much like the BIOS
savier from before - so it is a pleasure to work with as a linuxbios developer.

It is still a work in progress, however , I already submit the patch.
All on board devices and slots work as expected, only need some more stress
testing with the RAM, acpi, etc..

Signed-off-by: Daniel Toussaint <daniel@dmhome.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4075 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-06 13:38:54 +00:00
Stefan Reinauer 38891ab7e6 cross compilation fix for motorola sandpoint based boards
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4074 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-05 08:43:44 +00:00
Stefan Reinauer 85107f28da two more totalimpact briq fixes. Gets us back to the romfs breakage on PPC
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4073 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-05 08:39:13 +00:00
Stefan Reinauer a73fc4b6c5 Makefile includes were mixed up.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4072 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-04 22:55:49 +00:00
Stefan Reinauer 9f243a1132 fix this warning:
coreboot-v2-4067//src/stream/ide_stream.c: In function 'stream_ide_read':
coreboot-v2-4067//src/stream/ide_stream.c:47: warning: declaration of 'offset' shadows a global declaration
coreboot-v2-4067//src/stream/ide_stream.c:13: warning: shadowed declaration is here

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4071 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-04 22:27:10 +00:00
Stefan Reinauer dd0b6ff4dd fix this warning for the embedded planet ep405pc
/tmp/ccilLWBf.s: Assembler messages:
/tmp/ccilLWBf.s:144: Warning: setting incorrect section attributes for .rodata.pci_driver

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4070 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-04 22:24:23 +00:00
Stefan Reinauer 14ad50edf6 This fixes a race condition (revealed by my other check-in r4067) in the
romtool by changing the Makefiles to be no longer recursive (once again,
recursive make is to be considered harmful).  Tried to (quickly) unify most of
the Makefile code, but medium-term this is going to be worked on for Kconfig
support anyways.

Also fix a sign cast error in rom-mkpayload in case people want to compile this
with -W -Werror

Patch relative to coreboot-v2/util/romtool

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
and
Acked-by: Stefan Reinauer <stepan@coresystems.de>
in order to get the tree working decently asap



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4069 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-04 22:18:26 +00:00
Stefan Reinauer 16e34b98a1 small workaround for romtool incompatibility with ppc ports
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4068 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-04 18:40:46 +00:00
Stefan Reinauer e6cc67b07a build romtool in mainboard target directory.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4067 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-04 18:24:21 +00:00
Stefan Reinauer 8e304e6616 fix cross compilation in abuild for certain scenarios
(coreboot.org build system internal)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4066 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-04 18:16:11 +00:00
Stefan Reinauer 6e244da7a5 fix variable shadowing in lzmadecode.c (trivial)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4065 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-04 13:28:40 +00:00
Stefan Reinauer be84b01e18 fix some warnings by casting safely. (trivial)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4064 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-04 13:20:33 +00:00
Stefan Reinauer 962242ad2d use $(MAKE) instead of hardcoded "make".. (trivial)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4063 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-04 13:05:18 +00:00
Stefan Reinauer 2ddacb60d4 fix configuration step of totalimpact briq and embeddedplanet ep405pc.
(trivial).

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4062 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-04 12:52:28 +00:00
Patrick Georgi 2d2589e682 Fix the concurrency issue of building romtool.
romtool is still built in util/romtool, as happens without this patch.

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4061 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-04 10:01:21 +00:00
Ronald G. Minnich d7a709a60f These are some cleanups and changes. These are build and boot tested on qemu.
Some changes for option roms: 
- don't make users pick the name. Names for option roms are in the v3-defined
format of pci%04x,%04x.rom with the vendor and device id filling in the 
%04x. 
- users pass in vendor and device id. 
- users pass in a dest. If the dest is 0, the address of the ROM image in 
FLASH is returned. If the address is non-zero, then the decmpressor is called,
and it will make sure the ROM image is copied to the destination (even 
in the uncompressed case).

And some type and print cleanup. 

Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Myles Watson <mylesgw@gmail.com>




git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4060 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-03 22:23:34 +00:00
Patrick Georgi ace2dc5962 Add u64 typedef to ppc (trivial)
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4059 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-03 20:14:59 +00:00
Carl-Daniel Hailfinger 7b6ea25f21 Fix up the incomplete commit in r4055.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4058 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-03 16:40:44 +00:00
Stefan Reinauer edf480719a drop unused variables in generic smm handler. (trivial)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4057 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-03 16:33:50 +00:00
Stefan Reinauer 2fd2c7901e drop another shadow variable (trivial)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4056 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-03 16:31:01 +00:00
Carl-Daniel Hailfinger f7116c3bd0 There are more than a dozen targets in the v2 tree which refer to ROMCC
in their Config.lb but never use it. There's no point in keeping
dead code around.

This patch removes ROMCC remainders from Config.lb and kills orphaned
auto.c and failover.c in the affected mainboard directories.

arima/hdama
ibm/e325
ibm/e326
iwill/dk8s2
iwill/dk8x
msi/ms9282
newisys/khepri
sunw/ultra40
tyan/s2891
tyan/s2892
tyan/s2895
tyan/s4880
tyan/s4882

Abuild log is completely identical with and without the patch.

With this patch, the last ROMCC remainders for K8 boards are gone.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> 


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4055 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-03 16:29:35 +00:00
Patrick Georgi f16fb73087 I thought that romfs infrastructure is done now, but there were some
issues (see buildbot).
The romfs image was always built, and sometimes broke (because of
the different image layouts) for buildrom images. After the patch, these
issues are avoided by not adding payloads to the romfs image (they
wouldn't be read anyway). Both workarounds (in buildrom code for
romfs and vice-versa) aren't very pretty, but that's what our buildsystem
requires.
As I had to create a "communication channel" (via the romfs-support
files), I took the chance to also use it for compression
information, so if you configure lzma support, you'll get lzma
compressed payloads in romfs.

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4054 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-03 16:17:05 +00:00
Patrick Georgi d107831182 The attached patch tries new style compression first and runs old
style compression if the command returned an error code (happens if
you run an old lzma with the new arguments)

Tested on new-style lzma only (as I lack a build environment with
old lzma), but I tested that the old lzma returns with an error code.

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4053 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-03 15:57:58 +00:00