Commit Graph

1156 Commits

Author SHA1 Message Date
Martin Roth 0cf7acc688 nvramcui: Cast u8 * values to char * to eliminate warnings
error: pointer targets of 'strcmp' differ in signedness
expected 'const char *' but argument is of type
'u8 * {aka unsigned char *}'

Change-Id: Id5cbb6fc2efd7c57abc59b08416047e10461436f
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/14521
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-05-03 20:00:07 +02:00
Jonathan Neuschäfer f03217b6bb payloads/nvramcui: Make the makefile non-executable
Change-Id: Id584cbf02c9d3ecb89fcf2a3190f0a73816954a8
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/14526
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-05-01 16:28:56 +02:00
Martin Roth 4005d9b2e4 payloads: Add a stable version of Memtest86+ for reproducibility
Memtest86+ was pulling origin/master which will change over time.  This
adds a commit-id as a stable version to allow it to be reproducible.

The other secondary payloads, coreinfo and nvramcui, do not need this
because they are part of the coreboot repo and not fetched from an
external source.

Change-Id: I20c516010f76cf03342bd8883d0ee7ac5f8bc7e4
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/14520
Tested-by: build bot (Jenkins)
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-04-27 19:55:40 +02:00
Martin Roth 4793ec3ea1 Memtest86Plus/Makefile: Update to common payload makefile format
This series of patches attempts to update all of the external payload
makefiles to be as similar as possible.

- Add .git to the git repo URL to show that it's a git repo.
- Use the common checkout, fetch, and clone ($(project dir)) targets
- Add TAG-y and NAME-y variables - just with origin/master for now.
Stable will be added shortly.
- Make sure all phony targets are in .PHONY

Change-Id: If83c100841d5f91a9fab7ac44ba20ec2271c0594
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/14152
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-04-27 19:48:54 +02:00
Martin Roth 698366654c coreinfo: Update Makefile
- Get the absolute pathname for LIBPAYLOAD_PATH
- Update distclean:
--correctly remove .config and .config.old - *.config doesn't match
.config
-- remove obsolete files from cleanup

Change-Id: I6aa51b4ac2b392f786aeb12647be5073e6d02df5
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/14485
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-04-26 20:08:55 +02:00
Martin Roth f62065f15b nvramcui: Reformat nvramcui.c
Change-Id: I89dca25d93a4c94cc51f313397e49ba763948450
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/14484
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-04-26 20:08:32 +02:00
Martin Roth 9bc6674b7c nvramcui: Remove unnecessary header files
Change-Id: If845729bc34df646a5628ac2a35acc737fd4701d
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/14483
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-04-26 19:58:52 +02:00
Martin Roth 3383a25f91 payloads/Makefile.inc: Add phony targets
Add 'nvramcui' target to make it easier to build and test.
Put both nvramcui & coreinfo targets into .PHONY because they
both exist as directories.

Change-Id: I9cf76785e69f3c8e47fe92f1b1648fd0f7a63c3e
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/14481
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-04-25 16:45:26 +02:00
Stef van Os c012428291 libpayload: time: split time.h from libpayload.h
Move time functions and prototypes from libpayload.h to time.h.
In a similar manner to other c libary headers, this change makes
porting existing applications to libpayload easier.

Change-Id: I71e27c6dddde6e77e0e9b4d7be7cd5298e03a648
Signed-off-by: Stef van Os <stef.van.os@prodrive-technologies.com>
Reviewed-on: https://review.coreboot.org/14437
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-04-21 23:08:52 +02:00
Iru Cai 12b641d3df coreinfo: Build libpayload in coreinfo directory
When building libpayload, make the build directory and .config outside
libpayload source directory so it'll not pollute the libpayload source
and cause conflicts with other builds.

Change-Id: Idcfbc7dbe4d52a3559229d8450c3efaafd33b93b
Signed-off-by: Iru Cai <mytbk920423@gmail.com>
Reviewed-on: https://review.coreboot.org/14389
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-04-21 23:06:41 +02:00
Iru Cai 736aa74faf add nvramcui as a secondary payload
Change-Id: Ie38a358ebd2d040ce32b3eeaeb664c568d4dc51e
Signed-off-by: Iru Cai <mytbk920423@gmail.com>
Reviewed-on: https://review.coreboot.org/14378
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
2016-04-20 18:42:52 +02:00
Iru Cai e44b407b00 nvramcui: Update Makefile
* use crossgcc to build nvramcui
* build libpayload dependency

Change-Id: Ife3054aeb03b4da0568ad47f96c633460d6c07ae
Signed-off-by: Iru Cai <mytbk920423@gmail.com>
Reviewed-on: https://review.coreboot.org/14377
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-04-20 18:41:37 +02:00
Martin Roth 41f0e0fd4d libpayload: disable EHCI & XHCI in defconfig-mips
drivers/usb/xhci.c and drivers/usb/ehci.c both require arch/barrier.h.

barrier.h is present for x86, arm, and arm64, but not for mips. This
is generating a build error after enabling USB by default on libpayload.

I believe that this slipped through the buiders due to them not getting
cleaned fully.  It was caught in the coverity scan and when setting up
a new build server.

Change-Id: Idd89409a048009c087ce2a787d96a1efd089157f
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/14391
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2016-04-18 14:24:21 +02:00
Stefan Reinauer 777028fd8a libpayload: Split off generic serial API from 8250 driver
There is a lot of generic code in the 8250 driver that should
be available for non-8250 systems with serial ports as well.

Change-Id: I67fcb12b5fa99ae0047b3cbf1815043d3919437e
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/14371
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-04-16 01:08:23 +02:00
Stefan Reinauer 785a31d67e Makefile.inc: Move payload code to payloads/
Change-Id: I91d9537e8c78560c944c552255e703fc0e6f1f78
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/14349
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
2016-04-15 16:25:28 +02:00
Marcel Meißner cb672a5857 libpayload: Enable USB support by default
Most people use USB keyboards.

Change-Id: Ia7cf513059565db7b86190c4aae62d7a35392408
Signed-off-by: Marcel Meißner <mm-meissner@gmx.de>
Reviewed-on: https://review.coreboot.org/7540
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-04-14 19:48:16 +02:00
Martin Roth 888a98b872 payloads: add iPXE 'payload' build
We already have the ability to add a pxe rom to cbfs, but it needs to be
configured and built separately.

This moves the existing Kconfig options for PXE from device/Kconfig and
the top level Makefile.inc to payloads, and adds the option to download
and build iPXE as part of the coreboot build process.

This configures the serial output of iPXE to match coreboot's serial
port configuration by editing the .h files. iPXE doesn't give any
real build-time method of setting these configuration options.

Change-Id: I3d77b2c6845b7f5f644440f6910c3b4533a0d415
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/14085
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-04-13 17:45:37 +02:00
Jonathan Neuschäfer 2bf7a2ca82 coreinfo: Move time to the last line
There are more modules in a category than categories. Moving the clock
down leaves more space for the list of modules.

Change-Id: I536dafe32e1abb1995c8a1942d70e0d90b905612
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/14255
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
2016-04-10 18:13:40 +02:00
Jonathan Neuschäfer a4fbc385e0 libpayload/libc: Fix memset/sizeof usage
Since r is a pointer, memset(r, 0, sizeof(r)) would only zero the first
4 (or 8) bytes of the newly allocated struct align_region_t.

An alternative to this patch would be to use calloc, or introduce a new
zalloc (zeroed allocation; a single-element calloc) and use that.

Change-Id: Ic3e3487ce749eeebf6c4836e62b8a305ad766e7e
Found-by: Coverity (ID 1291160)
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/14244
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-04-06 13:33:07 +02:00
huang lin 7b9bca0b2b libpayload: mmu: Initialize the base 4GiB as device memory
This allows to accommodate different platforms' default
configurations, memory configuration is fine tuned later during boot
process.

BUG=chrome-os-partner:51537
BRANCH=none
TEST=none yet, the full stack of patches boots fine on EVB

Change-Id: I39da4ce247422f67451711ac0ed5a5e1119ed836
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 97a9a71ade4df8a501043f9ae58463a3135e2a4f
Original-Change-Id: I39da4ce247422f67451711ac0ed5a5e1119ed836
Original-Signed-off-by: huang lin <hl@rock-chips.com>
Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/332384
Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/13914
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-04-05 13:34:47 +02:00
Martin Roth 6959f5c915 libpayload: update junit.xml target, clean up output
- Copy each config in configs/ to the junit_config, update each,
in turn, and clean up when done.  This avoids updating the saved
config files and creating dirty files in git.
- Use 'make olddefconfig' instead of 'yes "" | make oldconfig'
- Update clean target to remove junit_config file
- Update distclean target to remove junit.xml

Change-Id: Ib023eb3197f2d8806c73c9c18464157ce3de958f
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/14164
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-03-25 18:18:27 +01:00
Martin Roth ae269c0276 payloads: Add a target to print payload git urls and directories
Being able to fetch this list will allow the jenkins builder to securely
fetch the external payloads so we can start testing payload builds.

Change-Id: I777229216b2f11f0f427cd5f8cfa003da4171a77
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/14132
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-03-21 14:32:02 +01:00
Martin Roth e68a4385d4 payloads/Makefile.inc: Clean up Makefile
- Instead of adding each payload to each common target, create a list
and loop through the list for all of the payloads
- '.phony' doesn't work - the target needs to be uppercase '.PHONY'

Change-Id: I4a7712c94d0f127c2fff8cb8fada4b8132a4ab3b
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/14131
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-03-21 04:03:24 +01:00
Martin Roth c8ed34075b payloads/external: Rename Makefile.inc to Makefile
These makefiles are not included by anything, so they shouldn't be
named Makefile.inc.  Also, having them all be named 'Makefile' makes
some other consolidation work I'm doing much easier.

Change-Id: I1234539ba6a0a6f47d2eb0c21de3da3607c6b8de
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/14130
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-03-21 04:03:16 +01:00
Stefan Reinauer c2b50ace1b coreinfo: Allow numbers in addition to F keys
When using coreinfo on a serial console (at least
with gtkterm, picocom and minicom on Ubuntu 15.10)
you can't send F keys to the payload. Allow 1..9
for F1..F9

Change-Id: Ie3a11fa1de57c7345737a1ccaff177f407cd5e48
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/14065
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-03-18 21:47:46 +01:00
Stefan Reinauer 94534b3132 libpayload: recreate config files
Add all the default options with:

  for i in configs/*
  do
    cp $i .config
    make savedefconfig
    mv defconfig $i
  done

This also switches to minimal config files instead of the full
configuration files that were previously checked in.

Change-Id: If18a32eca4df9e1dfeb0e212b652d972cea8e4b8
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/14077
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins)
2016-03-16 17:56:32 +01:00
Stefan Reinauer 62af53fe10 coreinfo: Rename libpayload variables
LIBCONFIG_PATH -> LIBPAYLOAD_PATH
LIBPAYLOAD_DIR -> LIBPAYLOAD_OBJ

Change-Id: Idd9947bac594f5b109b877aefac70b1a1d2336eb
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/14099
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-03-16 17:55:59 +01:00
Stefan Reinauer 80547369ea coreinfo: Use tinycurses
When using PDcurses over a serial line, the background of
coreinfo is not properly cleared. Hence use tinycurses, which
was the only option when coreinfo was developed.

Change-Id: I15bb6eb552cf924de98d09ef63be33ecf336c526
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/14067
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins)
2016-03-15 21:45:26 +01:00
Stefan Reinauer 9125073d2a payloads: Enable building depthcharge as part of the coreboot build
For CHROMEOS builds, depthcharge can be built automatically.
This dependency exists because depthcharge without vboot and subsequent
signing of the image doesn't work very well, and both are keyed to that
flag as well.

Change-Id: Id0195bd3b4e454f382782106d6512469106daac5
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/10924
Tested-by: build bot (Jenkins)
2016-03-15 21:18:22 +01:00
Stefan Reinauer 821844534c libpayload: Move base address, stack and heap size to Kconfig
This will allow more payloads to use the standard linker script
instead of implementing their own.

Change-Id: Ie60120769829f427ceb722109d85859b61dbde31
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/14074
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-03-15 20:53:38 +01:00
Stefan Reinauer 347a7529aa libpayload: Make comment into help text
Change-Id: I8c8669e73e335e12cb3785cf84b878c305dd5929
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/14068
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-03-15 20:53:27 +01:00
Stefan Reinauer 805d44f2c7 libpayload: Fix ARM workaround code
_LDFLAGS+="foo" did not work in my shell (bash on Ubuntu 15.10),
so change it to _LDFLAGS="$_LDFLAGS foo". I'm mildly surprised
that this ever worked.

Change-Id: I59c10f34992240c6df2ec7f24aebc6daafb76493
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/14076
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-03-15 18:24:41 +01:00
Stefan Reinauer f0acf47ae1 libpayload: Add comment about ARM64 exception stack
Change-Id: I8b74cbf6bdde32c90ad0510e14e899711269e57f
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/14075
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-03-15 18:24:30 +01:00
Stefan Reinauer 31575f6391 coreinfo: Pretty print RAM addresses
Instead of 500, print 0x00000500 in the ram dump module.

Change-Id: Id250bd99f36dad4088ab88953fb371c400b4231b
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/14072
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-03-15 18:23:30 +01:00
Stefan Reinauer 1e6b86b8b6 libpayload: Move MEMMAP_RAM_ONLY to generic options
MEMMAP_RAM_ONLY is not an architecture specific option,
hence move it out of the architecture specific menu.

Change-Id: Iaeef03ed8cbff930a580ad03b1e712087b48714e
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/14071
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-03-15 18:23:11 +01:00
Stefan Reinauer 8fda04449f libpayload: Drop CONFIG_LP_CHROMEOS
This is adding complexity to the code more than it saves
space, plus some of the tables could potentially be interesting
outside of the ChromeOS context.

Change-Id: I4bf24608f3e26d3b7871a5031ae8f03bc2c8c21f
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/14070
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-03-15 18:22:58 +01:00
Stefan Reinauer 96d14ac1c9 libpayload: Unify defconfigs
Bring defconfig and defconfig-tinycurses in sync, so that
defconfig and defconfig-tinycurses only differ in the selection
of the curses implementation.

Change-Id: I739c5122b5aaaa2681055c845905721a0b2a11c1
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/14069
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-03-15 18:22:44 +01:00
Jonathan Neuschäfer d43186418a coreinfo: Remove the LAR module
Since libpayload's LAR support was dropped in If6e36569cd, this module
doesn't compile anymore.

Change-Id: I98f25613a1728e94704d9e9ccb65fd6ba33968b9
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/14037
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-03-13 08:24:49 +01:00
Antonello Dettori 3aa91dc7be payloads/seabios: Add "git revision" to the SeaBIOS version menu
Add an option to specify a git revision from which to build SeaBIOS.

Change-Id: Ifbf3b82e784f79395ab7cd07c5804f72928d7640
Signed-off-by: Antonello Dettori <dev@dettori.io>
Reviewed-on: https://review.coreboot.org/13937
Reviewed-by: Alexander Couzens <lynxis@fe80.eu>
Tested-by: build bot (Jenkins)
2016-03-12 20:23:50 +01:00
Martin Roth 6116f369e9 codebase: Change makefile $(shell pwd) commands to $(CURDIR)
- Change the makefile command $(shell pwd) to $(CURDIR) to find the
current directory without going out to the shell.

Change-Id: I4890eba6129630acd2883b92de77308d39949443
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/13967
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-03-11 18:48:06 +01:00
Martin Roth 00e49aed52 coreinfo: Fix libpayload to not install to libpayload/libpayload
Libpayload installs into the libpayload/ directory under the directory
you point it to.  Since we were pointing it to build/libpayload, it
was installing to build/libpayload/libpayload.

Change-Id: I11029fcfb232d9b66eb3f310fa9e663236d4b213
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/13966
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-03-11 18:47:43 +01:00
Jonathan Neuschäfer 71d3101259 coreinfo/nvram: Print correct line numbers
With this patch the numbers are the "base" addresses for the lines,
which is consistent with the PCI configuration space view.

Change-Id: I2c70d976f6f9f9f615d13bc7a634d6f8037e0c7b
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/14028
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-03-11 18:44:04 +01:00
Jonathan Neuschäfer ff09952921 coreinfo: Default to first non-empty category
... instead of the overall first one.

Change-Id: If9b2674ff2ef83b7c24a3388316b6f4128bc1007
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/14027
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
2016-03-11 18:43:22 +01:00
Jonathan Neuschäfer 5368504e44 coreinfo/cbfs: Add some missing file types
An alternative to this patch is to copy the filetypes table from
util/cbfstool/cbfs.h and use that.

Change-Id: Iebf3a7a8912761ff6825a6f51c8b68df0dcc5990
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/14026
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
2016-03-11 18:42:29 +01:00
Jonathan Neuschäfer 8a61a2f2d5 coreinfo: Show "No modules selected" when appropriate
Change-Id: I7222544757587b37e0cf632aa01d042414dde223
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/14025
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
2016-03-11 18:42:00 +01:00
Jonathan Neuschäfer 1aca8b898d coreinfo/cbfs: Don't assume that the free space is at the end
On emulation/qemu-i440fx, I get this layout:

  Name                           Offset     Type         Size
  cbfs master header             0x0        cbfs header  32
  fallback/romstage              0x80       stage        14284
  fallback/ramstage              0x38c0     stage        42382
  fallback/payload               0xdec0     payload      1165052
  config                         0x12a600   raw          352
  revision                       0x12a7c0   raw          572
  cmos_layout.bin                0x12aa40   cmos_layout  772
  fallback/dsdt.aml              0x12ad80   raw          4000
  img/coreinfo                   0x12bd80   payload      1165052
  (empty)                        0x2484c0   null         1799192
  bootblock                      0x3ff900   bootblock    1456

... which coreinfo displays in the following way, without this patch:

  cbfs master header
  fallback/romstage
  fallback/ramstage
  fallback/payload
  config
  revision
  cmos_layout.bin
  fallback/dsdt.aml
  img/coreinfo

  <free space>


Change-Id: I21eb1dfbe52921843d28683c9396e9b27caa4fbf
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/14024
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
2016-03-11 18:41:41 +01:00
Martin Roth 9c3ff1ba52 coreinfo/Makefile: change $(obj) to $(coreinfo_obj)
- Rename obj to coreinfo_obj so it doesn't conflict with the obj
variable in libpayload.

Change-Id: I2ffb06a87e30a5eeff5b0dfc0ba62b5e9ab46e26
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/13938
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-03-11 18:27:26 +01:00
Martin Roth 143a78c9f8 coreinfo: Remove .xcompile when doing a clean
Change-Id: I3e719e105c4bacd5e02e055d3f00650a1e126656
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/13965
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-03-11 18:26:55 +01:00
Martin Roth 342cf7f6a4 payloads/external/Makefile.inc: Don't rebuild SeaBIOS every time
Currently, if SeaBIOS is set as the payload, it gets rebuilt every
single time we do a build.

Change it to re-build just when there’s a config change.

Change-Id: Ib141f2cbf8796d449172432bb30fa4806cf90328
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/13948
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-03-11 18:03:13 +01:00
Martin Roth c3fbda4e73 nvramcui: Add distclean target
This doesn't do anything more than the clean target, but having both
clean and distclean targets in all makefiles makes standardizing the
cleaning routines easier.

Change-Id: I41578de371a8f767ee23266c30e65e928f0985c4
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/13939
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
2016-03-11 17:56:47 +01:00
Martin Roth 3f1abb84e8 SeaBIOS: Update SeaBIOS from repo when using master branch
Previously the SeaBIOS directory would never get updated after the
initial clone because the tag would always match. This can be shown
by noticing that the text 'Fetching new commits from the SeaBIOS
git repo' is never seen.

This change will always try to pull the latest code if 'Master'
is selected.

Change-Id: I460e2fb0c6f683a0f85343d164880c2d9e6d95cc
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/13947
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-03-11 17:56:05 +01:00
Paul Menzel 468dc33325 payloads/seabios: Update version number in Kconfig
Fix up commit 4f66648c (payloads/seabios: Upgrade stable from 1.9.0 to
1.9.1), forgetting to update the version number displayed in the Kconfig
menu, by updating the string to 1.9.1.

Change-Id: Idb395d0ea65bcf91c7c9645fd76d428936e91587
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: https://review.coreboot.org/14010
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins)
2016-03-11 16:54:23 +01:00
Martin Roth 5ad9acaba6 payloads: Move secondary payloads inside of a submenu
To keep the list of 'secondary' payloads from cluttering the payloads
menu, move them into their own menu under the payloads menu.  Then they
don't need any dependencies other than the architecture.

Change-Id: I95119750c6ef627ef0de9b5f5cbad085a51ac2bb
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/13941
Tested-by: build bot (Jenkins)
Reviewed-by: Ben Gardner <gardner.ben@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-03-09 17:03:21 +01:00
Martin Roth 679755778b Makefile: Update payload clean targets
Move payload clean targets into payloads/Makefile.inc
Add clean targets for coreinfo, nvramcui, Memtest86+

Change-Id: I70c13582311dfba3e309805053159f8a039cb109
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/13940
Tested-by: build bot (Jenkins)
Reviewed-by: Ben Gardner <gardner.ben@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-03-09 17:01:56 +01:00
Paul Menzel 4f66648c09 payloads/seabios: Upgrade stable from 1.9.0 to 1.9.1
SeaBIOS 1.9.1 was released on February 15th, 2016 [1][2] with the changes
below.

```
$ git log --oneline --reverse rel-1.9.0..rel-1.9.1
3403ac4 build: fix typo in buildversion.py
fe4154e xhci: Check for device disconnects during USB2 reset polling
c016236 xhci: Wait for port enable even for USB3 devices
0240428 sdcard: Only enable error_irq_enable for bits defined in SDHCI v1 spec
fe8d986 sdcard: fix typo causing 32bit write to 16bit block_size field
e902d3f nmi: Don't try to switch onto extra stack in NMI handler
dc6498e scsi: Do not call printf() from scsi_is_ready()
6027043 coreboot: Check for unaligned cbfs header
73f00bc fw/pci: do not automatically allocate IO region for PCIe bridges
b3ef39f biostables: Support SMBIOS 2.6+ UUID format
```

[1] http://www.seabios.org/Releases#SeaBIOS_1.9.1
[2] http://seabios.org/pipermail/seabios/2016-February/010493.html

Change-Id: I4bc8224c2a80cbcce54621e941a9c3a92ca04215
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: https://review.coreboot.org/13933
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Alexander Couzens <lynxis@fe80.eu>
2016-03-09 15:22:56 +01:00
Martin Roth be63a24c4c BuildSystem: Add Memtest86+ as a secondary payload
This allows memtest86+ to be added to CBFS as a 'secondary'
payload on x86 systems, to be loaded by the main payload
if desired.

Selecting this option, which defaults to no, builds the memtest86+
payload and adds it to CBFS as `img/memtest` which can then be
loaded by for example SeaBIOS or GRUB.

Change-Id: Iecf876aaf588ba1df7abdf6668cb26f089bf5f42
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/13858
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Ben Gardner <gardner.ben@gmail.com>
2016-03-05 22:57:53 +01:00
Iru Cai 283fd8e653 coreinfo: quote $(AS) and $(CC) in $(LPAS) and $(LPCC)
Without this change it'll get a build error with crossgcc-x64
because $(AS) is "util/crossgcc/xgcc/bin/x86_64-elf-as --32",
and running $(LPAS) (i.e. AS=$(AS) lpas) will run "--32" instead of
"x86_64-elf-as".

Change-Id: I95e5630cb1d4f1ce81a8ca8a7bf338450b325f02
Signed-off-by: Iru Cai <mytbk920423@gmail.com>
Reviewed-on: https://review.coreboot.org/13845
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-02-28 20:09:38 +01:00
Martin Roth 4351ace145 payloads: Load coreinfo as a secondary payload
This allows coreinfo to be added to CBFS as a 'secondary'
payload on x86 systems, to be loaded by the main payload
if desired.

Selecting this option, which defaults to no, builds the coreinfo
payload and adds it to CBFS as `img/coreinfo` which can then be
loaded by for example SeaBIOS or GRUB.

Change-Id: I52661d486823bc4bb215ce92dca118c9d2c2a309
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/13728
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-02-26 20:07:14 +01:00
Denis 'GNUtoo' Carikli 7d82499634 nvramcui: Add Makefile
Users had to build nvramcui manually because payload.sh was only meant
for abuild. Now the user can build it with:
  cd payloads/libpayload/ && make menuconfig && make && make install
  cd ../nvramcui && make

Change-Id: I409a3c39a1e1738e8071febb1a3f169e1aee959a
Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@no-log.org>
Reviewed-on: https://review.coreboot.org/13778
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-02-26 20:06:41 +01:00
Martin Roth 22aa9e3fcc u-boot: Make sure targets aren't duplicated
When U-Boot isn't selected as a payload, two of the targets:
$(project_dir): and $(project_dir)/$(TAG-y) evaluated to the same
value, generating a make warning when running a clean.  By adding
additional text to the file that is created, this is avoided.

Gets rid of these warnings:
Makefile.inc:54: warning: overriding commands for target `u-boot'
Makefile.inc:37: warning: ignoring old commands for target `u-boot'

Change-Id: I4b4df753612b674b3ccde2a757338840be92d1f2
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/13767
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-02-24 19:22:52 +01:00
Julius Werner 09f2921b5d cbfs: Add LZ4 in-place decompression support for pre-RAM stages
This patch ports the LZ4 decompression code that debuted in libpayload
last year to coreboot for use in CBFS stages (upgrading the base
algorithm to LZ4's dev branch to access the new in-place decompression
checks). This is especially useful for pre-RAM stages in constrained
SRAM-based systems, which previously could not be compressed due to
the size requirements of the LZMA scratchpad and bounce buffer. The
LZ4 algorithm offers a very lean decompressor function and in-place
decompression support to achieve roughly the same boot speed gains
(trading compression ratio for decompression time) with nearly no
memory overhead.

For now we only activate it for the stages that had previously not been
compressed at all on non-XIP (read: non-x86) boards. In the future we
may also consider replacing LZMA completely for certain boards, since
which algorithm wins out on boot speed depends on board-specific
parameters (architecture, processor speed, SPI transfer rate, etc.).

BRANCH=None
BUG=None
TEST=Built and booted Oak, Jerry, Nyan and Falco. Measured boot time on
Oak to be about ~20ms faster (cutting load times for affected stages
almost in half).

Change-Id: Iec256c0e6d585d1b69985461939884a54e3ab900
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/13638
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-02-22 21:38:37 +01:00
Aaron Durbin 152e5a03a1 libpayload: honor TSC information under CONFIG_LP_TIMER_RDTSC
When CONFIG_LP_TIMER_RDTSC is enabled honor the TSC information
exported in the coreboot tables as the cpu_khz frequency. That
allows get_cpu_speed() not to be called which currently relies
on the 8254 PIT. As certain x86 platforms allow that device
to be optional or turned off for power saving reasons, allow
a path where get_cpu_speed() is no longer called. Additionally,
this approach also allows the libpayload to not duplicate logic
that already exists in coreboot.

BUG=chrome-os-partner:50214
BRANCH=glados
TEST=Confirmed in payload TSC frequency is honored instead of
     using get_cpu_speed().

Change-Id: Ib8993afdfb49065d43de705d6dbbdb9174b6f2c4
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/13671
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Andrey Petrov <andrey.petrov@intel.com>
2016-02-19 19:50:25 +01:00
Martin Roth dbae4d03ef Payloads: Add U-Boot as a coreboot-payload
- Add Kconfig and Makefile options to use U-Boot as a payload.
- Add Kconfig option for extra cbfstool command line arguments.
- Add Kconfig & Makefile option to load the payload as a flat binary.
- Add u-boot directory to .gitignore.

This is currently working for X-86 only.

Graphics worked in U-Boot correctly by initializing the VBIOS and
setting up a console mode.

Tested in QEMU and on Minnowboard Max.  Got into U-Boot, have not
booted an OS yet.

Change-Id: Ia122a4ad7cd7d96107c1552b0376c8106ca8fb92
Signed-off-by: Martin Roth <martinroth@google.com>
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/12714
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-02-18 20:53:42 +01:00
Vladimir Serbinenko 2e8117143a payloads/external/GRUB2: Add a possibility to add custom modules.
Change-Id: I3004eac248561b0cd4e44bcef90fc66fae5d77ca
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: https://review.coreboot.org/13727
Tested-by: build bot (Jenkins)
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@googlemail.com>
2016-02-17 18:41:39 +01:00
Martin Roth f80331f261 SeaBIOS: Disable serial console if serial is memory mapped
SeaBIOS only supports standard IO based serial ports.  If the serial
port being used by coreboot isn't a standard IO serial port, disable
the serial console in the SeaBIOS build.

Change-Id: I386b46625fca0bd0a5416ed9831f8370c294ed74
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/13617
Tested-by: build bot (Jenkins)
Reviewed-by: Leroy P Leahy <leroy.p.leahy@intel.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-02-09 22:31:12 +01:00
Patrick Georgi d4adf58e03 libpayload: use 32bit access when accessing 4byte wide uart registers
This fixes serial on rk3288.

Change-Id: I3dbf3cc165e516ed7b0132332624f882c0c9b27f
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/13636
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)
2016-02-09 21:53:42 +01:00
Martin Roth 21c0650fdd Kconfig: Move payloads section to payloads/Kconfig
Move the payloads section of the kconfig tree out of the top level
kconfig file and into a separate Kconfig just for payloads before
it starts to get added to.

Change-Id: I4f52818f862bf1aeba538c1c6ed93211a78b9853
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/13608
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-02-09 20:31:52 +01:00
Ruilin Hao 5bcbd11b0d libpayload: Add timer driver for armada38x
Add timer driver for armada38x

BUG=chrome-os-partner:47462
TEST=emerge-cyclone libpayload
BRANCH=tot

Change-Id: Iefb6d1fcb907edb54d55ba8addfb66329af6c3c7
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: cd467160ecab050a541a445c2afab9e6bc625635
Original-Change-Id: Id42bafdbc34295b6f8afe5610fb3bab0e0e1b6e8
Original-Signed-off-by: Ruilin Hao <rlhao@marvell.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/313343
Original-Commit-Ready: Kan Yan <kyan@google.com>
Original-Tested-by: Kan Yan <kyan@google.com>
Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Original-Reviewed-by: Yuji Sasaki <sasakiy@chromium.org>
Reviewed-on: https://review.coreboot.org/13114
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-02-04 11:32:22 +01:00
Martin Roth 50943b15a3 payloads/coreinfo: Add defaultbuild target
Add a single target to do the full coreinfo build using default Kconfig
values for both coreinfo and libpayload.

Change-Id: Id622fb2df480e826f6d868dbe01385d76587be26
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/13426
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-02-02 03:24:21 +01:00
Patrick Georgi 67e11d1e4f payloads: fix dependencies for seabios and filo
config and revision data need to be around before they're added to CBFS.

Change-Id: I195156773effd5137c3fda3639c002fbec6e7158
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/12971
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-01-18 18:57:08 +01:00
Daisuke Nojiri d201e8c38a cbgfx: add error code to cbgfx_init
cbgfx_init can fail for multiple reasons. These codes help debugging
cbgfx_init.

BUG=chromium:502066
BRANCH=tot
TEST=Tested on Glados

Change-Id: Ifaa8d91b058bd838a53faf5d803c0337cb1e082c
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 4caf2496f3583e133f3f216ec401515c267e6e7b
Original-Change-Id: I84f60dd961db47fa426442172ab19676253b9495
Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/315550
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/12930
Tested-by: build bot (Jenkins)
Reviewed-by: Nico Huber <nico.h@gmx.de>
2016-01-14 18:44:20 +01:00
Martin Roth d4c2484cc8 Makefile.inc: Move addition of payload rev & config to payload makefile
These files need to be added to cbfs-files after PAYLOAD_CONFIG
and PAYLOAD_VERSION have been defined.  Where they were before,
they didn't get added to the final build.

Change-Id: Ib1b230f9eb72a8c1710ef473a9f24c0fb7ec6e17
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/12751
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-12-20 02:42:38 +01:00
Daisuke Nojiri 6d2c7226cb libpayload: add archive.h
archive.h is a header file for the programs which need to parse an archive
created by 'archive' tool. See archive.h for the format description.

BUG=chromium:502066
BRANCH=tot
TEST=Tested on Glados

Change-Id: I2bee9d7c12b0e1bce1529dfef360c5fa4ce0872d
Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/311201
Reviewed-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://review.coreboot.org/12734
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-12-16 19:00:53 +01:00
Martin Roth 5a8d619a1c libpayload/configs/config.veyron: Use CONFIG_LP_8250_SERIAL_CONSOLE
- Update to use the CONFIG_LP_8250_SERIAL_CONSOLE instead of the removed
CONFIG_LP_8250_MMIO32_SERIAL_CONSOLE.
- CONFIG_LP_LZ4 and CONFIG_LP_PL011_SERIAL_CONSOLE are set to the
default values for these new config options.

CONFIG_LP_8250_MMIO32_SERIAL_CONSOLE was removed in
commit 4d5317e5 (libpayload: Remove redundant 8250 MMIO32 UART driver)

Change-Id: I97461c5e0c14075dcf8a35c96a0b0f1651e2e8e4
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/12654
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-12-06 22:24:30 +01:00
Martin Roth 2a27a85809 libpayload/configs/config.purin: Use CONFIG_LP_8250_SERIAL_CONSOLE
- Update to use the CONFIG_LP_8250_SERIAL_CONSOLE instead of the removed
CONFIG_LP_8250_MMIO32_SERIAL_CONSOLE.
- CONFIG_LP_LZ4 and CONFIG_LP_PL011_SERIAL_CONSOLE are set to the
default values for these new config options.

CONFIG_LP_8250_MMIO32_SERIAL_CONSOLE was removed in
commit 4d5317e5 (libpayload: Remove redundant 8250 MMIO32 UART driver)

Change-Id: I2775c3676d5f458a4c31fe0c1d571bc2b9221a5c
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/12653
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-12-06 22:23:12 +01:00
Alexander Couzens 7b45d07cff SeaBIOS: remove VERSION variable in coreboot Makefile
SeaBIOS dropped support of VERSION variable and
is reproducible without it.

Change-Id: Iea1dc20e18aa5c274060e3cd55cd9e95086a602d
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
Reviewed-on: https://review.coreboot.org/12645
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Kevin O'Connor <kevin@koconnor.net>
2015-12-06 00:44:12 +01:00
Patrick Georgi 864b48daf0 build system: add dependencies for GRUB2 and FILO
Make sure the build system knows how to start building the various
integrated payloads we support.

Change-Id: I2128d09c78795e0a41b055975e9f7052e3d951ee
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: https://review.coreboot.org/12641
Reviewed-by: Alexander Couzens <lynxis@fe80.eu>
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2015-12-05 16:06:47 +01:00
Patrick Georgi ec90adb2e7 build system: Drop useless variable and dependency
We don't need COREBOOT_ROM_DEPENDENCIES anymore because the dependencies
are taken care of by the cbfs-files mechanism. REFCODE_BLOB also doesn't
need to be an explicit dependency.

Change-Id: I3f32cce79683e57a174724179bc2ac59a8cdda94
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/12648
Tested-by: build bot (Jenkins)
Reviewed-by: Alexander Couzens <lynxis@fe80.eu>
2015-12-05 16:06:34 +01:00
Martin Roth 886f478925 external/Makefile.inc: Update SeaBIOS version file
SeaBIOS updated how versioning is done, and out/version.c no longer
exists.  The new file with version information is autoversion.h.

Change-Id: I10abee73ecc51e52c9ff7a2e7a9099339b1a4b40
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/12567
Tested-by: build bot (Jenkins)
Reviewed-by: Idwer Vollering <vidwer@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2015-12-04 18:57:08 +01:00
Alexander Couzens ac0bc0cd66 SeaBIOS: update stable release from 1.8.2 to 1.9.0
* The default boot menu key is now the ESC key (instead of F12)
* Initial support for Trusted Platform Module (TPM) hardware and BIOS calls
* Initial support for chain loading SeaBIOS from Grub (via multiboot
  support)
* Initial support for booting from SD cards on real hardware
* virtio 1.0 device support
* The build will no longer include the build hostname or build time on
  "clean" builds.  This makes the build binaries more "reproducible".
* Basic support for running SeaBIOS on Baytrail Chromebooks
* SeaVGABIOS improvements:
    * Improved support for old versions of x86emu (the "leal"
      instruction is now emulated)
* Several bug fixes and code cleanups

Change-Id: Ifbd50f1884959fed4c4f666b87f2ef7b4769c6d3
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
Reviewed-on: https://review.coreboot.org/12566
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Kevin O'Connor <kevin@koconnor.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-12-04 18:56:30 +01:00
Martin Roth 6e1192019e SeaBIOS/Kconfig: Remove SEABIOS_MALLOC_UPPERMEMORY option
This has been replaced by the PAYLOAD_CONFIGFILE option, allowing
any SeaBIOS config option to be set by a platform.

Change-Id: I584c4c481266740840158baba76581d68e69b448
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/12570
Tested-by: build bot (Jenkins)
Reviewed-by: Alexander Couzens <lynxis@fe80.eu>
2015-12-03 21:54:08 +01:00
Martin Roth 99d05c74b6 payloads/external/SeaBIOS: Add option for saved SeaBIOS .config
Instead of adding various SeaBIOS options into the coreboot Kconfig,
just add a way to use saved SeaBIOS .config files.  These files
can contain full SeaBIOS .configs, but is really intended for individual
options.

The coreboot Kconfig options take precedence over the settings in the
saved .config.

Change-Id: Ia7f9c76555b8e290777207b3f637c94c4d67a782
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/12568
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Alexander Couzens <lynxis@fe80.eu>
2015-12-03 21:52:48 +01:00
Daisuke Nojiri 03688ec1da libpayload: get cbfs offset & size for default media from lib_sysinfo
This change revives the path which was made inert by CL:308520. When
media == CBFS_DEFAULT_MEDIA, cbfs_get_file replaces it with a pointer
to a default media. Thus, get_cbfs_range does not set cbfs offset &
size from lib_sysinfo.

BUG=chrome-os-partner:47772
BRANCH=tot
TEST=Tested on Jerry and Glados

Change-Id: I012f7871336dd24b8eada5c96c4d72117921b0d2
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 279ba344788b4ba85f500e6cfcca8199af6d0a89
Original-Change-Id: I7f0798881519026a23d0801d0a790332ab878ff0
Original-Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/313205
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/12583
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-12-03 14:16:34 +01:00
Martin Roth cacbcf4815 coreinfo: use coreboot crosscompiler
Set up coreinfo makefile to use .xcompile and the coreboot 32-bit cross
compiler toolchain.

Restrict to x86_32 gcc compiler.

Tested in QEMU

Change-Id: I1cc180a5eeaf6cb9a36fdcef70a9819d0f459168
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/12454
Tested-by: build bot (Jenkins)
Tested-by: BSI firmware lab <coreboot-labor@bsi.bund.de>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-12-02 16:07:40 +01:00
Patrick Georgi 4013469c50 build system: add dependencies for SeaBIOS output
Change-Id: I7b9f1574f6d487c0a6e5c9095c25ee973a96fa89
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/12577
Reviewed-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins)
2015-11-30 21:21:41 +01:00
Alexandru Gagniuc 4d5317e5a4 libpayload: Remove redundant 8250 MMIO32 UART driver
The more generic 8250 driver can handle both port-mapped and memory-
mapped 8250-compatible UARTs, with different register sizes. Thus, a
separate driver for MMIO32 is not needed.
The generic 8250 driver was tested to work for both output and input,
on Apollolake SoC, which only presents an MMIO32 UART.

Change-Id: Idab766588ddd097649a37de92394b0078ecc660a
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: https://review.coreboot.org/12524
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2015-11-28 19:19:31 +01:00
Yasha Cherikovsky 37f4565b8b coreinfo: Rewrite bootlog_module
The old bootlog_module implementation was completely broken:
- It assumed that the console buffer is located at address 0x90000,
  and of size 64K. It is not correct nowadays.
- It displayed the buffer in a very hacky way, the code was riddled with
  TODOs and FIXMEs. Scrolling had sometimes unexpected behavior.

The new implementation:
- Uses the cbmem console as the source of data.
  It takes the console information from lib_sysinfo of libpayload, which is
  constructed from the coreboot tables (no more hardcoded adressess).
- Properly sanitizes the console buffer for display, which makes
  scolling and display much easier to implement.

Change-Id: I3f87ec920631da2acfd3f52273228703f22f469f
Signed-off-by: Yasha Cherikovsky <yasha.che3@gmail.com>
Reviewed-on: http://review.coreboot.org/12440
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2015-11-21 18:03:40 +01:00
Stefan Reinauer 5bbc5e5e0d libpayload: PDCurses: Remove trailing whitespace
find . -type f |xargs perl -pi -e 's, *$,,'
find . -type f |xargs perl -pi -e 's,	*$,,'

Change-Id: I62c2bc15b7c395a68b68422e701edf98b08e27c6
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/12399
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-11-20 16:27:36 +01:00
Yasha Cherikovsky b7eb1715ba coreinfo: Move screen dimensions to header
The screen dimensions need to be known in other files.

Change-Id: Idf6f02e4cadbece78096ccd464296ecec405574d
Signed-off-by: Yasha Cherikovsky <yasha.che3@gmail.com>
Reviewed-on: http://review.coreboot.org/12439
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
2015-11-19 17:32:24 +01:00
Yasha Cherikovsky ae16c4034c coreinfo: Fix off-by-one in displayed month of year
According to C documentation, the range of tm_mon in struct tm is [0, 11].
Before the patch, the displayed month was indeed incorrect.

Change-Id: I9f95f1e978c45b3635e2edfe1ec496d7b0dec00a
Signed-off-by: Yasha Cherikovsky <yasha.che3@gmail.com>
Reviewed-on: http://review.coreboot.org/12438
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2015-11-19 00:02:13 +01:00
Yasha Cherikovsky 619fc95e7c coreinfo: Hide blinking cursor
Change-Id: I6297fc178203dcfbd0b2a4c78dd83359e7804933
Signed-off-by: Yasha Cherikovsky <yasha.che3@gmail.com>
Reviewed-on: http://review.coreboot.org/12437
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins)
2015-11-19 00:01:51 +01:00
Furquan Shaikh fe35623f20 libpayload: udc/dwc2: Ignore setup packet in check for queue empty
during shutdown

DWC2 UDC controller always requires an active packet to be present in
EP0-OUT to ensure proper operation of control plane. Thus, during
shutdown ignore EP0-OUT for queue empty check if only 1 packet is
present.

BUG=b:24676003
BRANCH=None
TEST=Compiles successfully. "fastboot reboot-bootloader" reboots
device without timeout in udc shutdown.

Change-Id: Iafe46c80f58c4cd57f8d58f060d805b603506bbd
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 4e7c27d849c0411aae58e60a24d8170a27ab8485
Original-Change-Id: Ifa493ce0e41964ee7ca8bb3a1f4bb8726fa11173
Original-Signed-off-by: Furquan Shaikh <furquan@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/311257
Original-Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Original-Tested-by: Furquan Shaikh <furquan@chromium.org>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/12413
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins)
2015-11-13 00:53:02 +01:00
Furquan Shaikh 1dcb10eeb6 libpayload: queue: Add a helper macro for checking singleton queue
Check if the simple queue consists of only 1 element.

BUG=b:24676003
BRANCH=None
TEST=Compiles successfully.

Change-Id: Ib257a5e6b9042b42c549f8ad8b943e3b75fd8c9c
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 5435d6fec1c4fbb4c04ba5b8c15caff9ee4e50f0
Original-Change-Id: I7a8cb9c4e7e71956e85e65b3e7b8e0af4d354110
Original-Signed-off-by: Furquan Shaikh <furquan@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/311256
Original-Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Original-Tested-by: Furquan Shaikh <furquan@chromium.org>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/12412
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins)
2015-11-13 00:52:58 +01:00
Stefan Reinauer 4f85a1eb76 libpayload: Rename PDCurses-3.4 to PDCurses
Change-Id: If881ec130833c7e7e62caa3d31e350a531f5bc8e
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/12398
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-11-11 21:38:48 +01:00
Stefan Reinauer 2ea24dabd6 PDCurses: Don't hard code version number
Don't hard code the PDCurses version number in every file
added to the object list.

Change-Id: Ic2e9230b7e3089c60dd7f442e3ea7baffb4aa400
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/12397
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-11-11 21:38:34 +01:00
Furquan Shaikh bf54c2cc5c libpayload/udc: dwc2: Add handler for add_strings
BUG=b:24676003
BRANCH=None
TEST=Compiles successfully. fastboot devices shows serial number for
shark.

Change-Id: I61d6c168fa458d1f880bc566db997aa5d6398361
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 45b286b318281aea9a4b0362c9259d748b66fd28
Original-Change-Id: Ib9cc22de9daa6c5ec9cde1e62c6f5f768e946069
Original-Signed-off-by: Furquan Shaikh <furquan@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/310984
Original-Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Original-Tested-by: Furquan Shaikh <furquan@chromium.org>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/12348
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-10 14:10:39 +01:00
Furquan Shaikh 3d6c95c1cd libpayload/udc: dwc2: Add timeout for shutdown operation
BUG=b:24676003
BRANCH=None
TEST=Verified that udc shutdown returns after the timeout.

Change-Id: I5df598c4eddecbecb353343ef5a4e44eae4fc20b
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 268913f21adea9969c9f88e3cb759341a60719f0
Original-Change-Id: I3ee059791d6e821f83f9ac41fd7c5385bd60e21e
Original-Signed-off-by: Furquan Shaikh <furquan@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/310983
Original-Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Original-Tested-by: Furquan Shaikh <furquan@chromium.org>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/12347
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)
2015-11-10 14:10:02 +01:00
Rajmohan Mani 1528ffa57c libpayload: xhci: Add delay to get reset working more reliably
Existing Intel xHCI controllers require a delay of 1 ms,
after setting the CMD_RESET bit in command register, before
accessing any HC registers. This allows the HC to complete
the reset operation and be ready for HC register access.
Without this delay, the subsequent HC register access,
may result in a system hang, very rarely.

Verified CherryView / Braswell platforms go through over
1000 warm reboot cycles (which was not possible without
this patch), without any xHCI reset hang in depthcharge.

BRANCH=None
BUG=None
TEST=Verified CherryView / Braswell platforms go through
over 1000 warm reboot cycles, without any xHCI reset hang
in depthcharge.

Change-Id: I8eff5115ca52738bdcf8bc65fbfb2a5f60a0abe1
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 3e7ea70df36e3bf35a6ee1297640900ee76bfdac
Original-Change-Id: Id681a19d0eedb0e2c29e259c5467bcde577e3460
Original-Signed-off-by: Rajmohan Mani <rajmohan.mani@intel.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/310022
Original-Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/12325
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)
Reviewed-by: Nico Huber <nico.h@gmx.de>
2015-11-05 17:40:30 +01:00
Patrick Georgi 102245fbed libpayload: Avoid confusing usb debug output in dwc2 driver
enqueue_packet already runs start_ep_transfer, which enqueues the next
job. It's pretty much guaranteed that the port will look busy.

BUG=none
BRANCH=none
TEST=no spurious ep 0-0 busy messages

Change-Id: I9cbfa7b51dd37564262295ddbcdd0755da40c05b
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 8997dbd78dc363334f4e22eaa61f25de1449ffba
Original-Change-Id: I8a39713fc1d6f16b80284e0f21dc95685716a9b7
Original-Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/308763
Original-Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Original-Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Original-Reviewed-by: yunzhi li <lyz@rock-chips.com>
Reviewed-on: http://review.coreboot.org/12259
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-05 17:39:58 +01:00
Patrick Georgi b791799d9a libpayload: Fix building dwc2 UDC driver with debug enabled
hexdump() now takes a pointer instead of an int-containing-an-address.

BUG=none
BRANCH=none
TEST=building with USB_DEBUG works

Change-Id: Idd0c43031a212c8f3b6489f533c488805d98d6a9
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 8660f6091bb124eeabe73302e8c7f1a8e46324f1
Original-Change-Id: I266efcb8b939d6da104ad05a3e79a78065c60beb
Original-Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/308762
Original-Commit-Ready: Patrick Georgi <pgeorgi@chromium.org>
Original-Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Original-Reviewed-by: yunzhi li <lyz@rock-chips.com>
Reviewed-on: http://review.coreboot.org/12258
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-11-05 17:39:52 +01:00