Commit Graph

2651 Commits

Author SHA1 Message Date
Paul Menzel aad4587c03 viatool/quirks: Add newline to end of file
Change-Id: If505021c6dd4bc1c98094dc6e4a3da1ea7753859
Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>
Reviewed-on: https://review.coreboot.org/15916
Tested-by: build bot (Jenkins)
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
2016-07-28 20:18:10 +02:00
Elyes HAOUAS e3e2bb0a89 util: Correct typo in MSR_EBC_SOFT_POWERON
Change-Id: Iba5fc92d8740d0bb7d41f8a83513ba7fb97be592
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/15900
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-07-28 01:09:37 +02:00
Elyes HAOUAS 7ab98fb790 util/msrtool: update register for Pentium4_later
Update MSR's registers regarding "Intel® 64 and IA-32
Architectures Software Developer’s Manual"- April 2015.
"64-ia-32-architectures-software-developer-manual-325462.pdf"

Change-Id: I71e399c4a6fef9de6a5581b64a6918660b2f8445
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/15798
Tested-by: build bot (Jenkins)
Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
2016-07-28 01:09:02 +02:00
Elyes HAOUAS e5a5084b70 msrtool/README: Remove trailing spaces
Change-Id: I8b7d2263591608e0ab9504262bb06eac4cb52850
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/15779
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-07-28 01:08:47 +02:00
Paul Kocialkowski 46114517d7 Rename VB_SOURCE to VBOOT_SOURCE for increased clarity
This renames the VB_SOURCE variable to VBOOT_SOURCE in the build system,
providing increased clarity about what it represents.

Since the submodule itself is called "vboot", it makes sense to use that
name in full instead of a very shortened (and confusing) version of it.

Change-Id: Ib343b6642363665ec1205134832498a59b7c4a26
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-on: https://review.coreboot.org/15824
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-07-27 17:26:05 +02:00
Paul Kocialkowski 7899db2355 buildgcc: Never set GMP CFLAGS manually in order to get the right flags
When no CFLAGS are explicitly provided to it, the GMP configure script
will figure out the best optimization flags to use on its own. In
particular, it will setup the march, mfpu and mtune flags based on
hardware detection.

However, when CFLAGS are provided, they are used as-is and such
detection doesn't happen. When the march, mfpu and mtune flags are not
provided (which happens when GMP wasn't built already), not only will
related optimizations be disabled, but some code might not build because
of missing support. This happens with NEON instructions on ARMv7 hosts.

Thus, it is better not to set CFLAGS and leave it up to the GMP
configure script to get them right and still reuse those later.

Change-Id: I6ffcbac1298523d1b8ddf29a8bca1b00298828a7
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Reviewed-on: https://review.coreboot.org/15452
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Nico Huber <nico.h@gmx.de>
2016-07-21 11:49:25 +02:00
Antonello Dettori 613702b5dc cbmem: share additional time stamps IDs
Split the additional time stamps concerning depthcharge from
the cbmem utility sourcecode and move them into
commonlib/timestamp_serialized.h header.

Change-Id: Ic23c3bc12eac246336b2ba7c7c39eb2673897d5a
Signed-off-by: Antonello Dettori <dev@dettori.io>
Reviewed-on: https://review.coreboot.org/15725
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-07-20 22:09:24 +02:00
Martin Roth 6101dfbaf3 buildgcc: Update the revision to 1.41
The binutils patch went in without updating the revision,
so we need to update it now. This was done in commit bcfa7ccb
(buildgcc: Update to binutils-2.26.1 & Fix aarch64 build issue)

Change-Id: Ifad4a2e3973f1f60d0ea840945e2bd097e1b4474
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/15712
Tested-by: build bot (Jenkins)
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-07-16 00:03:30 +02:00
Martin Roth bcfa7ccb28 buildgcc: Update to binutils-2.26.1 & Fix aarch64 build issue
- Update to the latest version of GNU binutils
- Add a patch to undo the changes to binutils done by commit c1baaddf
so that arm-trusted-firmware builds correctly again.

Test: Build arm-trusted-firmware (ATF) with this patch.  Build ATF
with binutils 2.26.1 changing the '.align x,0' to '.align x', which
changes the padding bytes to NOP instructions.  Verify that everything
except the padding bytes is the same.

See https://sourceware.org/bugzilla/show_bug.cgi?id=20364 for more
information about this issue.

Change-Id: I559c863c307b4146f8be8ab44b15c9c606555544
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/15711
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Furquan Shaikh <furquan@google.com>
2016-07-14 23:58:56 +02:00
Jonathan Neuschäfer 8660580567 util/riscvtools: Provide a tohost/fromhost symbols so Spike doesn't hang
See https://github.com/riscv/riscv-isa-sim/issues/54 for more
information.

Change-Id: I8cda8dc07866d395eb3ce5d94df8232840fa8b82
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/15288
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2016-07-14 18:23:05 +02:00
Martin Roth bfe6f6a72e kconfig: add olddefconfig target to help
olddefconfig is used to expand the miniconfig files with all the default
values removed by the 'savedefconfig' target.

Change-Id: Ic9c62f4c334919e8be478d30099819b90891670a
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/15319
Tested-by: build bot (Jenkins)
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-07-12 19:23:36 +02:00
Nico Huber 234d246535 buildgcc: Add option to bootstrap a host gcc
Bootstrapping gcc is the recommended way if your host gcc's version
doesn't match the gcc version you're going to build. While a build
with an outdated host gcc usually succeeds, an outdated gnat seems
to be a bigger issue.

v3: Some library controversy: gcc likes the libraries it ships with
    most but we don't want to install shared libraries. So we build
    them static --disable-shared) and install only the minimum
    (libgcc, libada, libstdc++). However, as the code of these
    libraries might be used to build a shared library we have to
    compile them with `-fPIC`.

v4: o Updated getopt strings.
    o The workaround for clang (-fbracket-depth=1024) isn't needed
      for bootstrapping and also breaks the build, as clang is only
      used for the first stage in that case and gcc doesn't know
      that option.

So far build tested with `make BUILDGCC_OPTIONS="-b -l c,ada"` on
  o Ubuntu 14.04 "Trusty Tahr" (i386)
  o Debian 8 "Jessie" (x86_64) (building python (-S) works too)
  o current Arch Linux (x86_64)
  o FreeBSD 10.3 (x86_64) (with gcc-aux package)

and with clang host compiler, thus C only: `make BUILDGCC_OPTIONS="-b"`
on
  o Debian 8 "Jessie" (x86_64)
  o FreeBSD 10.3 (x86_64)

v5: Rebased after toolchain updates to GCC 5.3.0 etc.

Build tested with `make BUILDGCC_OPTIONS="-b -l c,ada"` on
  o Debian 8 "Jessie" (x86_64)

Change-Id: Icb47d3e9dbafc55737fbc3ce62a084fb9d5f359a
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/13473
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-07-05 11:52:57 +02:00
Nico Huber 11ea2b378b buildgcc: Make package build() function more versatile
Refactor build() to make things more flexible:

Add a parameter that tells if we build a package for the host or for a
target architecture. This is just passed to the build_$package()
function and can be used later to take different steps in each case
(e.g. for bootstrapping a host gcc).

Move .success files into the destination directory. That way we can tell
that a package has been built even if the package build directory has
been removed.

Change-Id: I52a7245714a040d11f6e1ac8bdbff8057bb7f0a1
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/13471
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-07-05 11:52:40 +02:00
Patrick Georgi 2b80734811 fmaptool: Accept hex values with uppercase letters
Due to a newer flex version with which the scanner was recreated, we
also have to make the compiler less strict on the generated code.

Change-Id: I3758c0dcb2f5661d072b54a30d6a4ebe094854e6
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/15482
Tested-by: build bot (Jenkins)
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-07-04 12:17:51 +02:00
Antonello Dettori 0b806285a7 cbfstool: Require "-m ARCH" to extract payloads and stages
Require the user to specify which architecture the payload/stage
was built for before extracting it.

Change-Id: I8ffe90a6af24e76739fd25456383a566edb0da7e
Signed-off-by: Antonello Dettori <dev@dettori.io>
Reviewed-on: https://review.coreboot.org/15438
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-07-02 03:27:33 +02:00
Jonathan Neuschäfer e1a022ade4 util/kconfig: Fix gconfig build
This linker error was the problem:

build/util/kconfig/zconf.tab.o: In function `conf_read_simple':
/home/jn/dev/coreboot/util/kconfig/confdata.c:413: undefined reference to `kconfig_warnings'
/home/jn/dev/coreboot/util/kconfig/confdata.c:413: undefined reference to `kconfig_warnings'
build/util/kconfig/zconf.tab.o: In function `sym_calc_value':
/home/jn/dev/coreboot/util/kconfig/symbol.c:388: undefined reference to `kconfig_warnings'
/home/jn/dev/coreboot/util/kconfig/symbol.c:388: undefined reference to `kconfig_warnings'
collect2: error: ld returned 1 exit status
/home/jn/dev/coreboot/util/kconfig/Makefile:339: recipe for target 'build/util/kconfig/gconf' failed
make: *** [build/util/kconfig/gconf] Error 1

Change-Id: I4a667c7c15b35618fb9ad536f2be5044b8031ab4
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/15505
Tested-by: build bot (Jenkins)
Reviewed-by: Idwer Vollering <vidwer@gmail.com>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-07-01 19:29:53 +02:00
Martin Roth deed18627d rebase.sh: Update to current cros branch
Change-Id: I04add4e6fc957cb9a0cdefe79ec9e97e3cebdf8e
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/15322
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-06-29 16:48:18 +02:00
Werner Zeh 310580ea13 ifwitool: Fix gcc error due to shadowed global declaration
The name 'bpdt_size' is used for a function as well as ia local variable.
As ifwitool is compiled using HOSTCC, there can be an older gcc version
used for the compilation. With gcc version 4.4.7 I get the following
error: declaration of 'bpdt_size' shadows a global declaration
To fix it, rename the function to get_bpdt_size so that names are
unique now.

Change-Id: I47791c705ac4ab28307c52b86940a7a14a5cfef8
Signed-off-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-on: https://review.coreboot.org/15343
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Furquan Shaikh <furquan@google.com>
2016-06-26 10:49:06 +02:00
Benjamin Barenblat 82ef8ada82 src/commonlib/lz4_wrapper: Correct inline asm for unaligned 64-bit copy
Rewrite inline assembly for ARMv7+ to correctly annotate inputs and
outputs.  On ARM GCC 6.1.1, this causes assembly output to change from
the incorrect

	@ r0 is allocated to hold dst and x0
	@ r1 is allocated to hold src and x1
	ldr r0, [r1]		@ clobbers dst!
	ldr r1, [r1, #4]
	str r0, [r0]
	str r1, [r0, #4]

to the correct

	@ r0 is allocated to hold dst
	@ r1 is allocated to hold src and x1
	@ r3 is allocated to hold x0
	ldr r3, [r1]
	ldr r1, [r1, #4]
	str r3, [r0]
	str r1, [r0, #4]

Also modify checkpatch.pl to ignore spaces before opening brackets when
used in inline assembly.

Change-Id: I255995f5e0a7b1a95375258755a93972c51d79b8
Signed-off-by: Benjamin Barenblat <bbaren@google.com>
Reviewed-on: https://review.coreboot.org/15216
Tested-by: build bot (Jenkins)
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-06-24 19:10:05 +02:00
Alexander Couzens 2c68b1c732 cbfstool: Change CONFIG_FMD_GENPARSER if not set to n
When doing make in util/cbfstool it contaminates the tree because it generates
the fmd_parser.

Change-Id: Ida855d1e57560c76d3fcfcc8e2f7f75bcdfdd5d4
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
Reviewed-on: https://review.coreboot.org/15221
Tested-by: build bot (Jenkins)
Reviewed-by: Nico Huber <nico.h@gmx.de>
2016-06-21 17:55:17 +02:00
Julius Werner 119dcee1dd fmaptool: Make base offsets absolute in fmap_config.h
fmaptool generates a header file used to hardcode certain values from
the FMAP in coreboot's binaries, to avoid having to find and parse the
FMAP manually for every access. For the offset of the FMAP itself this
has already been using the absolute offset from the base of the whole
ROM, but for individual CBFS sections it only used the offset from the
immediate parent FMAP region. Since the code using it intentionally has
no knowledge of the whole section tree, this causes problems as soon as
the CBFS is a child section of something not at absolute offset 0 (as is
the case for most x86 Chromebooks).

Change-Id: If0c516083949fe5ac8cdae85e00a4461dcbdf853
Reported-by: Rolf Evers-Fischer <embedded24@evers-fischer.de>
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/15273
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-06-21 17:14:27 +02:00
Jonathan Neuschäfer 2459f67731 util/riscvtools: Add script that turns coreboot.rom into an ELF
This is required because SPIKE doesn't support loading flat files yet.

Change-Id: If745d78712ca8108b5dcc21591201bc2d3f70b86
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/14964
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-06-21 00:10:14 +02:00
Antonello Dettori fda691ef53 cbfstool: Extract payload in ELF
Implement function that automatically converts a SELF payload,
extracted from the CBFS, into an ELF file.

The code has been tested on the following payloads:
Working: GRUB, FILO, SeaBIOS, nvramcui, coreinfo and tint
Currently not working: none

Change-Id: I51599e65419bfa4ada8fe24b119acb20c9936227
Signed-off-by: Antonello Dettori <dettori.an@gmail.com>
Reviewed-on: https://review.coreboot.org/15139
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-06-17 20:44:28 +02:00
Antonello Dettori 3bded7db7e elfwriter: Fix multi-phdrs ELFs parsing
Allow to write multiple phdrs, one for each non-consecutive section
of the ELF.
Previously it only worked for ELFs contaning a single
program header.

Change-Id: If6f95e999373a0cab4414b811e8ced4c93c67c30
Signed-off-by: Antonello Dettori <dev@dettori.io>
Reviewed-on: https://review.coreboot.org/15215
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-06-17 20:04:27 +02:00
Furquan Shaikh e51c20bf2c ifwitool: Calculate checksum for subpart_dir
Checksum is calculated by using 2s complement method. 8-bit sum of the
entire subpart directory from first byte of header to last byte of last
partition directory entry.

BUG=chrome-os-partner:53508

Change-Id: I991d79dfdb5331ab732bf0d71cf8223d63426fa8
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/15200
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-06-16 19:38:36 +02:00
Rolf Evers-Fischer eb8b7d6ef4 ifwitool: Fix calculation of dst_size
Change-Id: I07523252eacffb323e2bb54c306f5e9ac83e4cbd
Signed-off-by: Rolf Evers-Fischer <embedded24@evers-fischer.de>
Reviewed-on: https://review.coreboot.org/15162
Tested-by: build bot (Jenkins)
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-06-15 17:37:17 +02:00
Furquan Shaikh e7f35cd292 ifwitool: Do not calculate checksum for subpart_dir
1. The checksum method that was documented is not correct. So, no use
filling in a value based on wrong calculations. This can be added back
once updated information is available.
2. Checksum does not seem to affect the booting up of SoC. So, fill in 0
for now.

Change-Id: I0e49ac8e0e04abb6d7c9be70323612bdef309975
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/15145
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-06-12 12:45:25 +02:00
Furquan Shaikh fe42b11cdf ifwitool: Correct pack order and header order
Update pack and header order and mark the entries as mandatory and
recommended w.r.t. ordering (mandatory = essential for booting,
recommended = okay to change, but this config is tested and known to work).

Change-Id: Ia089bdaa0703de830bb9553130caf91a3665d2c4
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/15144
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-06-12 12:44:23 +02:00
Chris Ching 5343b1fc27 autoport: Add prompt for enabling unsafe inteltool glx option
Change-Id: Ib674ab7ca8b6464de553a86536b1762fda98d94e
Signed-off-by: Chris Ching <chingcodes@google.com>
Reviewed-on: https://review.coreboot.org/14901
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-06-12 12:27:57 +02:00
Lee Leahy c9bf8bfabf util/checklist: Add bootblock support
Scan the boot block when building it with C_ENVIRONMENT_BOOTBLOCK
selected.

TEST=Build and run with Galileo Gen2

Change-Id: I922f761c31e95efde0975d8572c47084b91b2879
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/15130
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-06-09 23:10:40 +02:00
Stefan Tauner 37fcd58ba6 inteltool: handle unsafe dumping of graphics registers
The current implementation from Vladimir simply dumps 1 MB of memory
contents starting at the base address of the second PCI device (which
most likely is the VGA controller on Intel systems). This locks up a
number of different systems, e.g. my Ibex Peak-based T410s.

This patch documents the issue and stops dumping the graphics registers
for the -a/--all parameter.

Change-Id: I581bdc63db60afaf4792bc11fbeed73aab57f63a
Signed-off-by: Stefan Tauner <stefan.tauner@gmx.at>
Reviewed-on: https://review.coreboot.org/14627
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2016-06-08 22:35:57 +02:00
Antonello Dettori 75c37058b3 cbfstool: Allow to easily build the individual tools
Adds a label for each tool included in the cbfstool package
in order to build them more easily through Make.

Change-Id: Id1e5164240cd12d22cba18d7cc4571fbadad38af
Signed-off-by: Antonello Dettori <dettori.an@gmail.com>
Reviewed-on: https://review.coreboot.org/15075
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-06-08 18:47:49 +02:00
Omar Pakker a03609b496 intelmetool: Add the X99 ISA Bridge device id
This adds the ISA bridge device id for the Intel C160/X99 series
chipset to the intelmetool.

Change-Id: I2e7db0fe1692985ebb167b9a44ab412a45a9f3bd
Signed-off-by: Omar Pakker <omarpakker+coreboot@gmail.com>
Reviewed-on: https://review.coreboot.org/15053
Tested-by: build bot (Jenkins)
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@googlemail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-06-04 23:41:22 +02:00
Lee Leahy fc3741f379 Add Board Checklist Support
Build the <board>_checklist.html file which contains a checklist table
for each stage of coreboot.  This processing builds a set of implemented
(done) routines which are marked green in the table.  The remaining
required routines (work-to-do) are marked red in the table and the
optional routines are marked yellow in the table.  The table heading
for each stage contains a completion percentage in terms of count of
routines (done .vs. required).

Add some Kconfig values:
*  CREATE_BOARD_CHECKLIST - When selected creates the checklist file
*  MAKE_CHECKLIST_PUBLIC - Copies the checklist file into the
   Documenation directory
*  CHECKLIST_DATA_FILE_LOCATION - Location of the checklist data files:
   *  <stage>_complete.dat - Lists all of the weak routines
   *  <stage>_optional.dat - Lists weak routines which may be optionally
      implemented

TEST=Build with Galileo Gen2.

Change-Id: Ie056f8bb6d45ff7f3bc6390b5630b5063f54c527
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/15011
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-06-03 17:29:13 +02:00
Furquan Shaikh 55d2e5398b ifwitool: Fix syntax issues with ifwitool
Change-Id: Ie7a12a39116ee08f5e24c81c97695201169a63f7
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/15022
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-06-01 21:16:45 +02:00
Furquan Shaikh 233f1b6a38 ifwitool: Add new tool for managing IFWI images
- Supports following operations:
 1. add raw/dir sub-partition
 2. extract raw/dir sub-partition
 3. print info
 4. delete raw sub-partition
 5. replace raw/dir sub-partition

Change-Id: I683a0ab13cc50eb60eecca34db4a8ffefc8dccbd
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/14896
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-05-30 23:51:42 +02:00
Furquan Shaikh 161d2334e8 util/cbfstool: Include commonlib/helpers.h in common.h
This avoids re-declaring common macros like ARRAY_SIZE, MIN, MAX and
ALIGN. Also removes the issues around including both files in any
tool.

Also, fix comparison error in various files by replacing int with
size_t.

Change-Id: I06c763e5dd1bec97e8335499468bbdb016eb28e5
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/14978
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-05-28 08:48:45 +02:00
Furquan Shaikh 1ac194e14a cbfstool: Move cbfs_file_get_header to fit.c
Since fit.c is the only caller of this function move it out of common.c
and into fit.c.

Change-Id: I64cc31a6d89ee425c5b07745ea5ca9437e2f3fcf
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/14949
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-05-26 23:51:08 +02:00
Roberto Muñoz Gómez 15a53c6329 superiotool: Add support for chip NCT6102D / NCT6106D
Add support for chip NCT6102D / NCT6106D in superiotool

Change-Id: I689ff8e796f43a5aac144e9898df750407588b1f
Signed-off-by: Roberto Muñoz Gómez <munoz.roberto@gmail.com>
Reviewed-on: https://review.coreboot.org/14206
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins)
2016-05-26 01:05:25 +02:00
Aaron Durbin 493ec92eb3 util/cbfstool: allow option to honor FSP modules' linked address
If '-b' isn't passed when adding an FSP file type to CBFS allow
the currently linked address to be used. i.e. don't relocate the
FSP module and just add it to CBFS.

Change-Id: I61fefd962ca9cf8aff7a4ca2bea52341ab41d67b
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/14839
Tested-by: build bot (Jenkins)
Reviewed-by: Furquan Shaikh <furquan@google.com>
2016-05-18 03:19:12 +02:00
Jonathan Neuschäfer 0e962eeb93 board_status: Abort early if the coreboot image doesn't exist
Change-Id: I274c990e69634ebcb9dd77470cbf1515281de312
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/14683
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-05-18 00:17:18 +02:00
Duncan Laurie 4650f5baff sconfig: Add a new generic device type
Add support for a basic generic device in the devicetree to bind to a
device that does not have a specific bus, but may need to be described
in tables for the operating system.  For instance some chips may have
various GPIO connections that need described but do not fall under any
other device.

In order to support this export the basic 'scan_static_bus()' that can
be used in a device_operations->scan_bus() method to scan for the generic
devices.

It has been possible to get a semi-generic device by using a fake PNP
device, but that isn't really appropriate for many devices.

Also Re-generate the shipped files for sconfig.  Use flex 2.6.0 to avoid
everything being rewritten.  Clean up the local paths that leak into the
generated configs.

Change-Id: If45a5b18825bdb2cf1e4ba4297ee426cbd1678e3
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://review.coreboot.org/14789
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Leroy P Leahy <leroy.p.leahy@intel.com>
2016-05-16 19:49:59 +02:00
Duncan Laurie b7ce5fe311 sconfig: Add 10bit addressing mode to i2c device type
Use the second token for an i2c device entry in devicetree.cb to
indicate if it should use 10-bit addressing or 7-bit.  The default if
not provided is to use 7-bit addressing, but it can be changed to
10-bit addressing with the ".1" suffix.  For example:

chip drivers/i2c/generic
  device i2c 3a.1 on end
end

Change-Id: I1d81a7e154fbc040def4d99ad07966fac242a472
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://review.coreboot.org/14788
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-05-16 19:49:46 +02:00
Duncan Laurie b1fb0152bf sconfig: Allow strings in devicetree.cb
Currently you cannot assign a string to a register in devicetree because
the quotes are removed when parsing and the literal is assigned directly.

Add a parse option for two double-quotation marks to indicate a string
and return a quoted literal that can be assigned to a register with a
'const char *' type.

Example:

chip drivers/i2c/generic
  register "hid" = ""INT343B""
  register "uid" = "1"
  device i2c 15 on end
end

Change-Id: I621cde1f7547494a8035fbbab771f29522da1687
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://review.coreboot.org/14787
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-05-16 19:49:37 +02:00
David Hendricks b2aa5283e6 board_status: Add longopt equivalents for older options
Long options can be useful when writing examples and documentation
as they are more expressive and obvious to the reader.

Change-Id: I39496765ba1f15ccc2ffe1ad730f0f95702f82b8
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: https://review.coreboot.org/14736
Tested-by: build bot (Jenkins)
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
2016-05-16 19:19:54 +02:00
Jonathan Neuschäfer 4aef682819 board_status: Add an option to set the SSH port
If the option is not provided, ssh uses the default port for the host,
which is usually 22, but may be overridden in the user's SSH
configuration.

Change-Id: I303e9aeae16bd73a96c5e6d54f8e39482613db28
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/14522
Tested-by: build bot (Jenkins)
Reviewed-by: David Hendricks <dhendrix@chromium.org>
2016-05-13 17:30:58 +02:00
Jonathan Neuschäfer 478c889847 board_status: Use explicit branch name in "git push"
In some configurations, "git push <remote>" (without a branch name)
refuses to do anything.

Change-Id: I23a401b39dd851e9723676586c7f29afa111b49d
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/14539
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: David Hendricks <dhendrix@chromium.org>
2016-05-13 17:29:35 +02:00
Stefan Tauner 572f074971 inteltool: update documentation
- manpage
 - usage message
 - new warning message if -S is used on an unsupported chipset

Change-Id: I1acaa5f4232b65244ec00fd22ec7460d9cc387f1
Signed-off-by: Stefan Tauner <stefan.tauner@gmx.at>
Reviewed-on: https://review.coreboot.org/14624
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2016-05-13 16:58:56 +02:00
Furquan Shaikh b0c2fe0554 cbfstool/fsp: Rename fsp1_1_relocate
FSP 2.0 uses the same relocate logic as FSP 1.1. Thus, rename
fsp1_1_relocate to more generic fsp_component_relocate that can be
used by cbfstool to relocate either FSP 1.1 or FSP 2.0
components. Allow FSP1.1 driver to still call fsp1_1_relocate which
acts as a wrapper for fsp_component_relocate.

Change-Id: I14a6efde4d86a340663422aff5ee82175362d1b0
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/14749
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
2016-05-11 18:38:28 +02:00
Furquan Shaikh 61c1a05c07 util/cbfstool: Allow xip/non-xip relocation for FSP component
Currently, convert_fsp assumes that the component is always XIP. This
is no longer true with FSP 2.0 and Apollolake platform. Thus, add the
option -y|--xip for FSP which will allow the caller to mention whether
the FSP component being added is XIP or not. Add this option to
Makefiles of current FSP drivers (fsp1_0 and fsp1_1).

Change-Id: I1e41d0902bb32afaf116bb457dd9265a5bcd8779
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/14748
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)
2016-05-11 18:38:13 +02:00