Commit Graph

33439 Commits

Author SHA1 Message Date
Angel Pons 6ad917606c mainboard/siemens: Use SPDX for GPL-2.0-only files
Done with sed and God Lines. Only done for C-like code for now.

Change-Id: I7b656f0244774cb174a90d97c5ae1c725802b636
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40099
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
2020-04-04 16:30:51 +00:00
Angel Pons 7544e2fc2c mainboard/roda: Use SPDX for GPL-2.0-only files
Done with sed and God Lines. Only done for C-like code for now.

Change-Id: Ib89ffc86d84550971b2c9a437581f1ad8e5c04ae
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40095
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
2020-04-04 16:30:10 +00:00
Angel Pons 53e528a607 mainboard/purism: Use SPDX for GPL-2.0-only files
Done with sed and God Lines. Only done for C-like code for now.

Change-Id: I22515873a28333607ad2552c1a417e649cfbaac8
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40093
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
2020-04-04 16:29:58 +00:00
Angel Pons f4702c297d mainboard/packardbell: Use SPDX for GPL-2.0-only files
Done with sed and God Lines. Only done for C-like code for now.

Change-Id: Ia380dd3faaaf7bdb16c8c877f5488dbbf01a4146
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40090
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
2020-04-04 16:27:44 +00:00
Angel Pons 08d9f9562e mainboard/msi: Use SPDX for GPL-2.0-only files
Done with sed and God Lines. Only done for C-like code for now.

Change-Id: Ia5985bd013f68f5510dcad1de5a233f899a63ca0
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40087
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
2020-04-04 16:25:29 +00:00
Angel Pons 89ab2503c9 mainboard/lenovo: Use SPDX for GPL-2.0-only files
Done with sed and God Lines. Only done for C-like code for now.

Change-Id: I7b7670bb541cf4814fd4958d5c0d8c68cbee80c2
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40085
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Peter Lemenkov <lemenkov@gmail.com>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
2020-04-04 16:22:40 +00:00
Angel Pons a21dff6799 mainboard/kontron: Use SPDX for GPL-2.0-only files
Done with sed and God Lines. Only done for C-like code for now.

Change-Id: I5aeaaf267a187105f08f48a010323baa77e06989
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40084
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2020-04-04 16:09:44 +00:00
Angel Pons 30a511cea6 mainboard/ibase: Use SPDX for GPL-2.0-only files
Done with sed and God Lines. Only done for C-like code for now.

Change-Id: Ic2989038a5f11981682443e77d8f639a3ef280f5
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40081
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2020-04-04 15:56:44 +00:00
Angel Pons 381c4eb53b mainboard/hp: Use SPDX for GPL-2.0-only files
Done with sed and God Lines. Only done for C-like code for now.

Change-Id: I42ab3846c75adca1fe74dfa5114c9b697127bb76
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40080
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2020-04-04 15:54:55 +00:00
Angel Pons 2dfba3708e mainboard/gizmosphere: Use SPDX for GPL-2.0-only files
Done with sed and God Lines. Only done for C-like code for now.

Change-Id: I1135a495053b1c1229c94c794664b23f50d50362
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40078
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2020-04-04 15:49:42 +00:00
Angel Pons 8dcc818b40 mainboard/gigabyte: Use SPDX for GPL-2.0-only files
Done with sed and God Lines. Only done for C-like code for now.

Change-Id: I90691355cfc73f0834d45024a2885998b5652f88
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40077
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2020-04-04 15:48:20 +00:00
Angel Pons c80e350089 mainboard/getac: Use SPDX for GPL-2.0-only files
Done with sed and God Lines. Only done for C-like code for now.

Change-Id: I9528563399d8f47570a602a378583487f3cacc8c
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40076
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2020-04-04 15:46:38 +00:00
Angel Pons ec9eb64f4c mainboard/foxconn: Use SPDX for GPL-2.0-only files
Done with sed and God Lines. Only done for C-like code for now.

Change-Id: I8da7a1a2ae85eb0a5a33c18f233228d81f6938f3
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40075
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2020-04-04 15:43:43 +00:00
Angel Pons 585495e887 mainboard/emulation: Use SPDX for GPL-2.0-only files
Done with sed and God Lines. Only done for C-like code for now.

Change-Id: I68d2a8ac6f201f3c1131252b2b53b2b17ece1db6
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40073
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2020-04-04 15:42:47 +00:00
Angel Pons 08da24e059 mainboard/biostar: Use SPDX for GPL-2.0-only files
Done with sed and God Lines. Only done for C-like code for now.

Change-Id: Ib697a4b1eb74cced9f22c3c602215f0dcac81f20
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40069
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2020-04-04 15:39:08 +00:00
Angel Pons 0c58dc6ce3 mainboard/apple: Use SPDX for GPL-2.0-only files
Done with sed and God Lines. Only done for C-like code for now.

Change-Id: I6537288b326172d70aac7849b8d9e33c7f5aff9c
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40065
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2020-04-04 15:35:32 +00:00
Angel Pons 652dce4d1f mainboard/sapphire: Use SPDX for GPL-2.0-only files
Done with sed and God Lines. Only done for C-like code for now.

Change-Id: I840a776c237a630c0ff6df7d2ee065be51224658
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40097
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2020-04-04 15:25:36 +00:00
Angel Pons 2c82fe3a4c mainboard/razer: Use SPDX for GPL-2.0-only files
Done with sed and God Lines. Only done for C-like code for now.

Change-Id: I8fb7bc8056bbd940a2286b6a11a819335aa77ace
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40094
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2020-04-04 15:23:54 +00:00
Angel Pons f149d4cd64 mainboard/ti: Use SPDX for GPL-2.0-only files
Done with sed and God Lines. Only done for C-like code for now.

Change-Id: Idcf639102b041ae46952df28c69dce02e1d3d689
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40103
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2020-04-04 15:22:06 +00:00
Angel Pons 4f2dacbf7f mainboard/system76: Use SPDX for GPL-2.0-only files
Done with sed and God Lines. Only done for C-like code for now.

Change-Id: I2aa745e03e62ff8b9b5c9cb6f91d7f832f599f8d
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40102
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2020-04-04 15:21:37 +00:00
Angel Pons 274a037f08 mainboard/sifive: Use SPDX for GPL-2.0-only files
Done with sed and God Lines. Only done for C-like code for now.

Change-Id: I8c9d06fd4d369ae18447dadf6ca9107e7bdbc727
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40100
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2020-04-04 15:19:45 +00:00
Angel Pons 7a400e2185 mainboard/supermicro: Use SPDX for GPL-2.0-only files
Done with sed and God Lines. Only done for C-like code for now.

Change-Id: Ie43c93c371073b4fe071b08522f351d0e20ed561
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40101
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2020-04-04 15:19:04 +00:00
Angel Pons 1f35dae585 mainboard/up: Use SPDX for GPL-2.0-only files
Done with sed and God Lines. Only done for C-like code for now.

Change-Id: I4d37fabe34265166019cdbbbe4ccb9772b87bff8
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40104
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2020-04-04 15:17:24 +00:00
Angel Pons 5c59680e7a mainboard/amd: Use SPDX for GPL-2.0-only files
Done with sed and God Lines. Only done for C-like code for now.

Change-Id: Iaabbc58a7089b28ebe23df3a04464234ff465486
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40063
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2020-04-04 15:16:49 +00:00
Angel Pons 1731d46ddc mainboard/compulab: Use SPDX for GPL-2.0-only files
Done with sed and God Lines. Only done for C-like code for now.

Change-Id: Iab4fb613bd33bc29630126a487525087c0fe7177
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40071
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2020-04-04 15:08:13 +00:00
Angel Pons e4cce3fb36 mainboard/elmex: Use SPDX for GPL-2.0-only files
Done with sed and God Lines. Only done for C-like code for now.

Change-Id: I957a5e19c5ce39203e4afb94cbcb3d2961fdfb43
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40072
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2020-04-04 15:07:17 +00:00
Angel Pons 0fcb1b826c mainboard/bap: Use SPDX for GPL-2.0-only files
Done with sed and God Lines. Only done for C-like code for now.

Change-Id: Ic93a89a2d5cbae851a3ed0d1f04055a182bbb85b
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40068
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2020-04-04 15:06:12 +00:00
Angel Pons 09481b1b86 mainboard/asrock: Use SPDX for GPL-2.0-only files
Done with sed and God Lines. Only done for C-like code for now.

Change-Id: I32c5f5e865b5455ddb7034612ecea1383932cef9
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40066
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Maxim Polyakov <max.senia.poliak@gmail.com>
2020-04-04 15:03:12 +00:00
Angel Pons 85bf79d31f mainboard/facebook: Use SPDX for GPL-2.0-only files
Done with sed and God Lines. Only done for C-like code for now.

Change-Id: I311c62e8321afa43fdb442e10158973ecdcca793
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40074
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
2020-04-04 15:02:44 +00:00
Angel Pons b67e979f48 mainboard/portwell: Use SPDX for GPL-2.0-only files
Done with sed and God Lines. Only done for C-like code for now.

Change-Id: Id24c3a4fa195ccaafeb1932482c17562213505a7
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40092
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Wim Vervoorn <wvervoorn@eltan.com>
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
2020-04-04 15:00:48 +00:00
Angel Pons c74dae927a src/device: Use SPDX for GPL-2.0-only files
Done with sed and God Lines. Only done for C-like code for now.

Change-Id: Id5fe26564147ec532850430ea55b19ee94d5c5a5
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40050
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
2020-04-04 14:59:33 +00:00
Angel Pons f23ae0b0f6 src/cpu: Use SPDX for GPL-2.0-only files
Done with sed and God Lines. Only done for C-like code for now.

Change-Id: I2adf28d805fe248d55a9514f74c38280c0ad9a78
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40049
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
2020-04-04 14:59:17 +00:00
Angel Pons a019524d35 sb/intel/bd82x6x: Use SPDX headers
Tested with BUILD_TIMELESS=1, Asus P8Z77-V LX2 remains identical.

Change-Id: I08b4f5f53e493371848f588e6976d349e56b0620
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40019
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-04-04 14:58:51 +00:00
Angel Pons 3ef916fa1b src/vendorcode: Use SPDX for GPL-2.0-only files
Done with sed and God Lines. Only done for C-like code for now.

Change-Id: I49dc615178aaef278d6445376842d45152759234
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40060
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
2020-04-04 14:58:21 +00:00
Angel Pons 182dbdeac4 src/southbridge: Use SPDX for GPL-2.0-only files
Done with sed and God Lines. Only done for C-like code for now.

Change-Id: I5b00b3e38edda90f35f0679cd4171a3499288f24
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40059
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
2020-04-04 14:57:51 +00:00
Andrey Petrov 8670e829a8 soc/intel/xeon_sp/cpx: Add multi-core init
Add minimal MP init. No SMM, no turbo, not c/p states.

TEST=boot linux kernel, observe CPUs are online, schedule tasks
and perform useful work. Tested on Cedar Island CRB with only 1
socket populated

Change-Id: I0af374ab3956009e9208917d911d29eb21db6069
Signed-off-by: Andrey Petrov <anpetrov@fb.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40035
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Maxim Polyakov <max.senia.poliak@gmail.com>
2020-04-04 04:27:45 +00:00
Angel Pons ebda03ea56 src/commonlib: Use SPDX for GPL-2.0-only files
Done with sed and God Lines. Only done for C-like code for now.

Change-Id: I29e746115e3b0630238176a0f913a3b5340962eb
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40047
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2020-04-04 01:14:24 +00:00
Angel Pons b706ab379f src/console: Use SPDX for GPL-2.0-only files
Done with sed and God Lines. Only done for C-like code for now.

Change-Id: Ib8a40e5633faf840e19a35bcdc8edc7e7cdd0ad9
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40048
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2020-04-04 01:14:11 +00:00
Julius Werner d61350c403 libpayload: malloc: Change memcpy() to memmove() in realloc
Our realloc() works (somewhat suboptimally) by free()ing the existing
allocation and then reallocating it wherever it fits. If there was free
space before the old location, this means the new allocation may be
before the old one, and if the free space block is smaller than the old
allocation it may overlap. Thus, we should be moving memmove() instead
of memcpy() to move the block over.

This is not a problem in practice since all our existing memcpy()s are
simple iterate and copy front to back implementations which are safe for
overlaps when the destination is in front of the source. but it's still
the more correct thing to do (in case we ever change our memcpy()s to do
something more advanced or whatever).

Signed-off-by: Julius Werner <jwerner@chromium.org>
Change-Id: I35f77a94b7a72c01364ee7eecb5c3ff5ecde57f6
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40028
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2020-04-03 19:56:27 +00:00
Matt DeVillier adbb224f5a mb/google/auron: Add support for ACPI backlight controls
Test: build/boot lulu and samus variants, verify backlight
control functional under Windows 10.

Change-Id: I4725fdea5206ae03df14a8b07e51fdf09f1edebd
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39944
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-04-03 16:26:20 +00:00
Matt DeVillier bb8b23eeaf mb/google/rambi: Disable console output by default
Disable SoC serial output by default, since no production devices
have this exposed, but leave it as a user option so it can be selected
as needed (eg, for use with a Google debug servo).

Same change as made for google/cyan in CB:39872

Change-Id: Id6b2c28658aca03d8c5042d719a0f6f504c29288
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39997
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2020-04-03 16:25:48 +00:00
Matt DeVillier 1d6e07348a mb/google/rambi: Convert to use override devicetree
Since the variants' devicetrees are almost identical, convert to
using an overridetree setup for simplicity.

Change-Id: I52b71cf12a4e0b67135cfb106c3e89b00205d3bc
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39996
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-04-03 16:25:43 +00:00
Matt DeVillier c0b028f205 mb/google/cyan: Adjust ACPI interrupt triggering for audio codecs
The jack detect GPIOs are initialized as dual edge-triggered GPIs,
and Linux doesn't care if they are set to ActiveLow, ActiveHigh, or
ActiveBoth -- a single interrupt is detected on jack insertion or
removal.

The Windows drivers on the other hand, will not function unless the
codec and LPE ACPI interrupts entries are set as in the Intel
Cherry Trail Tianocore platform reference code.

So adjust the ACPI interrupt triggers to make Windows happy, since
Linux doesn't care either way.

Test: boot Linux (GalliumOS 3.1) and Windows 10 on google/edgar,
observe functional audio output for both built-in speakers and
headphones.

Change-Id: Ic1dd8ece610d761791c060ece2d0aa51addf97ad
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/24989
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-04-03 16:25:27 +00:00
Matt DeVillier bf6b7bf60c mb/google/cyan: Adjust CID for realtek audio codec
Adjust CID to allow for Realtek's Windows drivers to attach
without breaking functionality under Linux.

Both Linux and Windows use ACPI HID/CID matching for driver attachment.
Since the Realtek 5650 isn't used in standard Windows laptops, the
'10EC5650' HID/CID isn't contained in the Windows drivers' lookup file
(.inf), but a catch-all 'INTCCFFD' entry does exist, so concatenate
that to the existing CID to allow the drivers to attach.

Test: build/boot google/edgar, verify working audio under
both Windows 10 (with Realtek drivers 10.0.10586.4393) and Linux
(GalliumOS 3.1 / kernel 4.16.18, Manjaro 18.1 / kernel 5.1.x)

Change-Id: Idca5cc86ba1f5ef3978cfba291a0c06e56ef5958
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40003
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-04-03 16:25:20 +00:00
Matt DeVillier a2804781fe mb/google/cyan: Switch eMMC and SD from ACPI to PCI mode
Braswell boards don't work well with the eMMC and SD controller
in ACPI in payloads other than depthcharge - SeaBIOS requires
an onerous workaround (manually determining the PCI BAR0 address
for each eMMC and SD controller, then adding adding etc/sdcard
entries to the CBFS), and Tianocore can't see the devices at all.
To make the common use-case work better, switch to PCI mode.

Test: build/boot cyan variants with SeaBIOS and Tianocore
payloads, verify eMMC and SD card visible and bootable to
both payloads and OSes.

Change-Id: I71947603e22a37fe2c8ef4eaac8a3aa0d0ed1cec
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40002
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-04-03 16:24:17 +00:00
Matt DeVillier 8fbfcc3a06 mb/google/cyan: convert to overridetree
Simply cyan variants by converting to overridetree format.

A few differences were ignored as there appears to be no
reason behind them:

- cyan had PCIe RP2 enabled, but nothing is attached to it
- kefka had the SPI 1 device disabled
- reks, relm, and ultima had HSUART 1 disabled
- edgar had I2C1 UPD disabled

Test: build/boot cyan and edgar variants, verify everything
still works

Change-Id: I9928cc59adcfda4661ddfdfa95f53a7820053b4a
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39964
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-04-03 16:23:42 +00:00
Matt DeVillier 0d58e64ddf mb/google/glados: convert to overridetree
Simplify glados variants by converting to overridetree format.

Change-Id: I6dd7a4b1ae7f1d3ce9fadb06ea95e021a1c880a5
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39983
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-04-03 16:23:25 +00:00
Matt DeVillier e7dc4f40ef mb/google/glados: drop VR configs from devicetree
The VR config values used in the variants' devicetrees is
identical to the domain defaults in vr_config.c, with the
exception of the icc_max value, which is calculated dynamically
based on SKU, and again matches the default values for
each domain and each varaint.

Test: add a print function to dump the VR config values for each
domain from the UPDs after setting, verify same output before/after.

Change-Id: I4307f6e19ae6f99d4f5e475b181fd66c5b92f28c
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39982
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-04-03 16:23:18 +00:00
Matt DeVillier d957d12e6d mb/google/glados: clean up variant devicetrees
In preparation for conversion to overridetree format, clean up
the variant devicetrees in order to minimize the differences
across glados variants. This entails:

- minor reformatting and reordering of devicetree entries
- addition of setting default values on boards which skipped them
- disabling unused I2C2 on boards which left it enabled
- ensuring TCC offset set for all SKL-Y boards
- setting VR mailbox command 1 for caroline
- skipping init for UART2 on cave and glados
- dropping unused PCIe RP5 for sentry

Change-Id: I628b20a69fab187e67901c9eb98c0e2ddcb76b0d
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39981
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-04-03 16:23:10 +00:00
Michael Niewöhner e4c784bd0d soc/intel/skylake: vr_config: enable PSI3 and PSI4 by default
There are boards that do not need a specific domain_vr_config because
the defaults provided by the soc code are sufficient. Currently, this
means that these boards can't benefit from lower power states (PSI 3
and 4) because the settings default to being disabled since at the time
the defaults have been defined (2015) there were bugs in FSP in this
regard.

Set the default values of psiXenable to 1 for boards that do not have a
domain_vr_config setting in their devicetree, just like Cannon Lake
does.

Boards that have a domain_vr_config and set their specific settings are
not affected at all. Currently, there are only three boards that have
no domain_vr_config:

- supermicro/x11-lga1151-series
  These boards have a MPS MP2955 which we can assume support for PS3
  (the MP2965 and MP2935 support it, too).
  S-series CPUs with a 1151 socket do not have C9/C10 but only C8 and
  since only C10 makes use of PS4, those CPUs won't ever request PS4.
  That means we do not need to disable it explicitly for these boards.

- 51nb/x210:
  Needs testing and/or VR datasheet check for PS3/PS4 support

Change-Id: I5b5fd9fb3b9b89e80c47f15d706e2dd62dcc0748
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39980
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Benjamin Doron <benjamin.doron00@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-04-03 16:23:01 +00:00