Commit Graph

78 Commits

Author SHA1 Message Date
Nico Huber eb881d46e2 3rdparty/libgfxinit: Update submodule pointer
Update libgfxinit to the latest master. Changes:

* Remove trailing whitespace in debug output.
* Change some types to make it verify with SPARK Pro.
* Add Broxton (Apollo Lake) support for eDP/DP/HDMI.
* Add Linux user-space test tool `gfx_test`.
* Add a README describing libgfxinit and the build process.

TEST=Booted lenovo/t420 and verified that internal and
     external displays are working.

Change-Id: I4d0e23b8a254234173461b831585eae58d3af58e
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/20091
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2017-06-08 14:15:19 +02:00
Nico Huber 7b79a338bd 3rdparty/libhwbase: Update submodule pointer
Update libhwbase to the current master. Some noteworthy changes:

* Add prerequisites for upcoming Apollo Lake support in libgfxinit.
* Add some support for Linux user-space for libgfxinit's `gfx_test`.
* Fix compilation with GCC 7.

Change-Id: If3c65065ef9a2ff6fce221939fda43c9e30c1eb8
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/20090
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2017-06-08 14:14:45 +02:00
Martin Roth 76b8c0e044 3rdparty/arm-trusted-firmware: Update to upstream master
Submodule 3rdparty/arm-trusted-firmware 236c27d21f..3944adca59

This brings in 241 new commits from the upstream arm-trusted-firmware
repository, merged to the upstream tree between December 30, 2016 and
March 18, 2017.

3944adca Merge pull request #861 from soby-mathew/sm/aarch32_fixes
..
e0f083a0 fiptool: Prepare ground for expanding the set of images at
runtime

Also setup ATF builds so that unused functions don't break the build.
They're harmless and they don't filter for these like we do.

Change-Id: Ibf5bede79126bcbb62243808a2624d9517015920
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/18954
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2017-05-18 23:55:48 +02:00
Nico Huber 989aae9f61 3rdparty/libgfxinit: Update submodule pointer
Some renamings force us to update our code:

  * Scan_Ports() moved into a new package Display_Probing.

  * Ports Digital[123] are called HDMI[123] now (finally!).

  * `Configs_Type` became `Pipe_Configs`, `Config_Index` `Pipe_Index`.

Other noteworthy changes in libgfxinit:

  * libgfxinit now knows about ports that share pins (e.g. HDMI1 and
    DP1) and refuses to enable any of them if both are connected
    (which is physically possible on certain ThinkPad docks).

  * Major refactoring of the high-level GMA code.

Change-Id: I0ac376c6a3da997fa4a23054198819ca664b8bf0
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/18770
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Martin Roth <martinroth@google.com>
2017-04-08 13:02:44 +02:00
Marshall Dawson 3c645391c0 3rdparty/blobs: Update for AMD Stoney Ridge
Add the binaryPI file for the FT4 package and add SMU firmware to
be consumed by fanless OPNs.

Change-Id: I1c9b5ded6b494fac1553cc2ec7756a7a47386ecf
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/18988
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2017-03-28 22:33:14 +02:00
Martin Roth ba2531c8a2 3rdparty/vboot: Update to upstream master
This brings in 70 new commits from the upstream vboot repository,
dated October 31, 2016 to March 2, 2017

Change-Id: Iac9c2b0389afbfa02c1cccc38d39a12dac4a5ac4
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/18953
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-03-27 02:57:08 +02:00
Martin Roth f34ca46fa6 3rdparty: update arm-trusted-firmware submodule
Updated to arm-trusted-firmware TOT:
236c27d2 (Merge pull request #805 from Xilinx/zynqmp/addr_space_size)
183 commits between Sep 20, 2016 and January 10, 2017

- Also add associated change to src/soc/rockship/rk3399 Makefile.inc
that is required to build the M0 Firmware.

Change-Id: I49695f3287a742cd1fb603b890d124f60788f88f
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/18024
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-01-12 18:38:26 +01:00
Martin Roth 74e0b2795f chromeec: Update Chrome EC submodule
Update to Chromium TOT with bcffec7f (reef: Cleanup battery code)

292 commits between Oct 28, 2016 and Jan 2, 2017

Change-Id: I6bc356b9e458bebaa5839375ff40dd7e0d6ccff1
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/18023
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-01-10 17:23:37 +01:00
Nico Huber f971dcbf25 3rdparty/libgfxinit: Update to latest master
Changes:

  o Verification that the framebuffer matches the display mode

  o Automatic upscaling if the framebuffer resolution is lower
    than the display mode's

  o VGA-plane support

  o HDMI pixel rate is limited to hardware constraints

  o Error tolerant handling of EDID header-pattern

Change-Id: Icbfdf5f37caf99f66847a71f784730aced0826ab
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/17775
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-12-15 23:47:53 +01:00
Marshall Dawson 2ab96fc955 3rdparty/blobs: Update for AMD Stoney Ridge
Update the blobs submodule to bring in the binaries for 00670F00.
This also corrects some formatting in the various license.txt files.

Change-Id: I7a70d1168734d06ef6919d83dd73bc8f2bc4173c
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/17872
Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
Tested-by: build bot (Jenkins)
2016-12-15 00:37:09 +01:00
Nico Huber 542e9488bd drivers/intel/gma: Hook up libgfxinit
Add `libgfxinit` as another option for native graphics initialization.
For that, the function gma_gfxinit() (see drivers/intel/gma/i915.h) has
to be called by the respective northbridge/soc code.

A mainboard port needs to select `CONFIG_MAINBOARD_HAS_LIBGFXINIT` and
implement the Ada package `GMA.Mainboard` with a single function `ports`
that returns a list of ports to be probed for displays.

v2: Update 3rdparty/libgfxinit to its latest master commit to make
    things buildable within coreboot.

v3: Another update to 3rdparty/libgfxinit. Including support to select
    the I2C port for VGA.

Change-Id: I4c7be3745f32853797d3f3689396dde07d4ca950
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/16952
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2016-11-29 23:46:05 +01:00
Nico Huber c83239eabc Hook up libhwbase in ramstage
It's hidden behind a configuration option `CONFIG_RAMSTAGE_LIBHWBASE`.

This also adds some glue code to use the coreboot console for debug
output and our monotonic timer framework as timer backend.

v2: Also update 3rdparty/libhwbase to the latest master commit.

Change-Id: I8e8d50271b46aac1141f95ab55ad323ac0889a8d
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/16951
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2016-11-29 23:45:40 +01:00
Furquan Shaikh 06eee265c2 3rdparty/vboot: update to latest master
Require new recovery reason for rec hash space lock failure in RO.

Change-Id: I606d1a1f51a3a4c127b2933f6fb00ba2ec4885fc
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/17340
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)
2016-11-10 00:57:27 +01:00
Nico Huber ef405a2c04 Set up 3rdparty/libgfxinit
`libgfxinit` is a SPARK library for graphics modesetting. It supports
Intel integrated graphics only, strictly speaking, the Core i processor
line.

Change-Id: Idf4b0e5fbf37a5d974075b2e44d1fa16dc428da3
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/16949
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-10-29 01:35:03 +02:00
Nico Huber e09f8acdad Set up 3rdparty/libhwbase
`libhwbase` is a SPARK library that contains some basic support for i/o
access, debugging, timers. Just what I put around `libgfxinit`, to make
it build standalone.

Change-Id: I1918680c14696215522e1c5dae072235bb4e71a3
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/16948
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-10-29 01:34:45 +02:00
Duncan Laurie 6733e7d54f chromeec: Update Chrome EC submodule
Update to Chromium TOT with ea1a8699e96425806abdd532d04da254ae093f6e

Change-Id: I28b9f415a4d55442c294abd27c344a91608a06c0
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://review.coreboot.org/17185
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)
2016-10-29 01:24:47 +02:00
Duncan Laurie 11afdbf67c chromeec: Update submodule
Update the chromeec submodule to current Chromium TOT.

Change-Id: Ia3d913703fdea0ece02074d8e2d4b30d97e9a97c
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://review.coreboot.org/17179
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-10-28 18:59:55 +02:00
Martin Roth 8337a3867b 3rdparty/vboot: update to latest master for rotor support
This pulls in the bdb support for futility so that rotor can build.

Change-Id: Icfa432fb840bea3e1616933ed02cf34a681fa3ce
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/17061
Tested-by: build bot (Jenkins)
Reviewed-by: Daisuke Nojiri <dnojiri@chromium.org>
2016-10-21 19:39:00 +02:00
Lin Huang 7d8ccfb9b3 google/gru: pass the gpio power supply enable pin to bl31
We need to disable some regulators when the device goes into suspend.
This means that we need to pass some gpios to bl31, and disable these
gpios when bl31 runs the suspend function.

BRANCH=None
BUG=chrome-os-partner:56423
TEST=enter suspend, measure suspend gpio go to low

[pg: also update arm-trusted-firmware to match]

Change-Id: Ia0835e16f7e65de6dd24a892241f0af542ec5b4b
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 0f3332ef2136fd93f7faad579386ba5af003cf70
Original-Change-Id: I03d0407e0ef035823519a997534dcfea078a7ccd
Original-Signed-off-by: Lin Huang <hl@rock-chips.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/374046
Original-Commit-Ready: Caesar Wang <wxt@rock-chips.com>
Original-Tested-by: Caesar Wang <wxt@rock-chips.com>
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/16719
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-10-07 17:09:02 +02:00
Martin Roth 5a859517e2 3rdparty/blobs: Update to get AGESA binary for pcengines/apu2
The AGESA binary for PC Engines' APU2 board was just added to the blobs
directory.  Update the submodule pointer to allow access.

Change-Id: Ic2995f253d12d17e229526cb71dea5bf65fa36f9
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/16253
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@googlemail.com>
2016-08-21 21:20:13 +02:00
Patrick Georgi 88a25ec20a 3rdparty/vboot: update to latest master
Half a year has passed. Fixes went in. Probably bugs, too.
However, nobody really supports our local vboot version anymore.

Change-Id: I5042f23686dfe98e540c482f744e9df2d7df3b19
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/16055
Tested-by: build bot (Jenkins)
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Paul Kocialkowski <contact@paulk.fr>
2016-08-04 23:22:36 +02:00
Martin Roth 935a4303d7 3rdparty/chromeec: Update submodule to latest
From: 388a7fa8 (Wed, 10 Feb 2016)
CR50: remove incorrect output length check in RSA decrypt

To: 83b6d697 (Mon, 1 Aug 2016)
g: increase usb console TX buffer size to 4K

676 commits

Change-Id: Ic80de8b6fd6d9eba2a092b1a3493931241a2e48b
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/16021
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-08-02 20:06:07 +02:00
Martin Roth 75ced9a123 3rdparty/arm-trusted-firmware: Update to Jun 8, 2016 master
90 patches pulled in.

Change-Id: I3b893957cbd330e71d0f218262e768f577df4c66
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/15122
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Furquan Shaikh <furquan@google.com>
2016-06-12 12:14:06 +02:00
Patrick Georgi c84e2fe893 3rdparty/blobs: add more Qualcomm stubs
Change-Id: Ie57b0b7844f28671b8d6a8efe9231a47bfb8f805
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/14745
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-05-10 21:22:28 +02:00
Patrick Georgi 30554c8416 3rdparty/arm-trusted-firmware: update to current master
It includes support for rk3399.

Change-Id: I326ef3dc3021313ee852395c302c076b3e3c8c5e
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/14732
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-05-09 06:50:07 +02:00
Patrick Georgi e355ee26b8 vboot: Update to current master to support S3 resume signalling
This is used in coreboot-side vboot code now, to keep booting from
the same RW section after wakeup - necessary when romstage is in RW
and its use of the RAM init configuration cache may differ between
versions.

Change-Id: Ie531cf3ddc980154f48772b3ff87e23473010721
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: https://review.coreboot.org/13844
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-02-29 20:19:06 +01:00
Patrick Georgi 800e964eef arch/arm64: Compile arm-trusted-firmware with coreboot timestamp
Update ATF codebase to a version that supports passing a timestamp and
fix the format to what it accepts now (including quotes).

This provides reproducible builds.

Change-Id: I12a0a2ba1ee7921ad93a3a877ea50309136ab1ab
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/13726
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-02-18 11:08:01 +01:00
Patrick Georgi 1509c908aa 3rdparty/chromeec: fix build with paths containing "@"
Move submodule forward to a newer upstream master to fix the build on
paths containing "@", as can happen on jenkins.

Change-Id: Ie74012725c379909d5bf631f9cc9969106ca52b8
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/13673
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-02-11 20:52:26 +01:00
Patrick Georgi ec0b586f92 3rdparty/chromeec: Add Chrome EC firmware sources
Note that this is a manually added commit id (to get the CrEC fixes in
that are necessary for building outside cros_sdk), so it will probably
fail.

Change-Id: Idc15cf268c663ae49b209b92b198c9a4d122c7e3
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/13546
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-02-05 10:34:17 +01:00
Patrick Georgi 43e6d6a124 3rdparty/vboot: update to current master
It provides a few extensions to the API that are required, such as
vb2api_check_hash_get_digest()

Change-Id: Ib4d8bdc29751f51f0f7532376175490a0ffd84b3
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/13590
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-02-04 17:30:38 +01:00
Martin Roth 9f656c0316 3rdparty/blobs: Update for latest Carrizo Blobs
Update the 3rdparty/blobs submodule to bring in the latest
CarrizoPI binaries.

Change-Id: I65769ebe7b2aa6508d0d6ab2df34a092751e1078
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/12425
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-12-07 16:10:29 +01:00
Patrick Georgi 5dba15c180 3rdparty/vboot: update to current master
Change-Id: Idc300472f8d8821dd362d6dd075150f285f1d09b
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/12207
Tested-by: build bot (Jenkins)
Reviewed-by: Furquan Shaikh <furquan@google.com>
2015-10-28 22:28:16 +01:00
Timothy Pearson 24e6d0445c cpu/amd/model_10xxx: Install AMD-provided microcode files in CBFS
Change-Id: I208b012c6b612a94b3bbc8235d5a005028be8bcc
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: http://review.coreboot.org/11832
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2015-10-16 02:41:37 +00:00
Paul Menzel 94020135c8 3rdparty/blobs: Update hash to latest commit in BLOBs repository
Update to commit 832bc6f1 (Remove microcode stored in C-array format),
which is the latest commit in the BLOBs repository.

Building the Lenovo X60 currently fails as the microcode file cannot be
found.

	    CREATE     build/mainboard/lenovo/x60/cbfs-file.wkWhPK.out (from src/mainboard/lenovo/x60/cmos.default)
	make: *** No rule to make target '3rdparty/blobs/cpu/intel/model_69x/microcode.bin', needed by 'build/cpu_microcode_blob.bin'.  Schluss.

Change-Id: I40ebceec299f46c19fd60861d872adcd91df3610
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: http://review.coreboot.org/11865
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2015-10-11 13:27:53 +00:00
Alexandru Gagniuc 321402bfce 3dparty/blobs: Advance to pull in binary microcode
Change-Id: I2071586e1f3b4464464928c11475f9283084dbcd
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/11693
Tested-by: build bot (Jenkins)
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
2015-09-29 04:49:46 +00:00
Stefan Reinauer e07e0441c2 Move blobs marker forward
b4ade40 via/nano: Move CPU microcode to 3rdparty/blobs
8921cc4 amd/model_fxx: Move CPU microcode to 3rdparty/blobs
1099605 amd/model_10xxx: Move CPU microcode to 3rdparty/blobs
5f5604e Convert microcode to binary

Change-Id: I276537281a01f8497ed87108e66574ec45265f3a
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/11129
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2015-08-07 07:16:27 +02:00
Patrick Georgi c88b8c24d9 vboot: Don't count boot attempts if lid is closed
This can be a problem with freshly updated devices that are periodically
powered on while closed (as explained in the bug report).

In this case, just don't count down. In case of actual errors (where we
want the system to fall back to the old code), this now means that the
retries have to happen with the lid open.

Bump vboot's submodule revision for the vboot-side support of this.

BUG=chromium:446945
TEST=to test the OS update side, follow the test protocol in
https://code.google.com/p/chromium/issues/detail?id=446945#c43
With a servo, it can be sped up using the EC console interface to start
the closed system - no need to wait 60min and plugging in power to get
to that state.

Change-Id: I0e39aadc52195fe53ee4a29a828ed9a40d28f5e6
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/10851
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2015-07-08 19:40:24 +02:00
Stefan Reinauer 5e4d53e12b blobs: move marker
Makes the following changes available:

61d663e blobs: Fix assembler code to allow dropping -Wa,--divide
a6c34a6 AMD Steppe Eagle: add PlatformMemoryConfiguration.h
95b8050 AMD FT3b binary PI: Fix Windows 7 graphics driver hang
c7c816e AMD Kern: remove PspSecureOs_prod_CZ.sbin

Change-Id: Ie8ce8278f72c998b91717658a6fc1d0948c7c50a
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/10824
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-07-07 17:59:19 +02:00
Stefan Reinauer b838469e62 arm-trusted-firmware: update marker
Change-Id: I8dddeead3c23a03803e7d8d5b2bfb8a15c5c2807
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/10645
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins)
2015-06-23 22:27:14 +02:00
Patrick Georgi 2f88b83ed1 submodules: add arm-trusted-firmware third-party repository
Change-Id: I080c0a5954d3e4b2d6debdf2a77f32df7329841c
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/10565
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
2015-06-23 08:20:24 +02:00
Marc Jones dbe6ba465e 3rdparty/blobs: Move submodule marker forward
Pick up the latest from blobs.
34b0926 AMD Merlin Falcon: remove build warnings
e581a5c AMD pi: replace LocateModule with agesawrapper_locate_module
c5ddfb6 AMD PI: remove unuseful code

Change-Id: I2b9d2b61cb00aa651b90dc76368d215077e27cad
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Reviewed-on: http://review.coreboot.org/10603
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-06-20 02:35:40 +02:00
Stefan Reinauer 7577c13cb6 3rdparty/blobs: Move marker forward
Change-Id: I2a9304a6b573a10e896f9ff77bfb09f20b21eb50
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/10541
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-06-15 18:39:09 +02:00
Marc Jones 538ce57d47 3rdparty/blobs: Move submodule marker forward
New marker includes:
3d5af98 microcode: Update Broadwell to MC0306D4_0000001F
349fd55 microcode: Update Baytrail to M0C30678_000082D
9077293 Add BLOBs to support AMD Embedded "Merlin Falcon" processor

Change-Id: I53f8f95079c6436ad316a11d432fcf92c03332b5
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Reviewed-on: http://review.coreboot.org/10506
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-06-11 19:14:58 +02:00
Marc Jones e7db9dd2a0 3rdparty/blobs: Move submodule marker forward
Move the 3rdparty/blobs marker to include the following:
a710941 amd/pi: Move AGESA cbfs access function to coreboot
63f1db5 AMD avalon: add PSP firmwares

Change-Id: Ie12b273ab9d22ab440b477919e70419b21cb833b
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Reviewed-on: http://review.coreboot.org/10202
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)
2015-05-13 22:55:50 +02:00
Patrick Georgi 29ed46cacc 3rdparty/vboot: Add vboot
This allows providing a verified boot mechanism in the
default distribution, as well as reusing vboot code like
its crypto primitives for reasonably secure checksums over
CBFS files.

Change-Id: I729b249776b2bf7aa4b2f69bb18ec655b9b08d90
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/10107
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-05-05 22:49:34 +02:00
Patrick Georgi 26e24cc12d 3rdparty: move to 3rdparty/blobs
There's now room for other repositories under 3rdparty.

Change-Id: I51b02d8bf46b5b9f3f8a59341090346dca7fa355
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/10109
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-05-05 22:49:18 +02:00
Patrick Georgi f4f028790a 3rdparty: Move to blobs
To move 3rdparty to 3rdparty/blobs (ie. below itself
from git's broken perspective), we need to work around
it - since some git implementations don't like the direct
approach.

Change-Id: I1fc84bbb37e7c8c91ab14703d609a739b5ca073c
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: http://review.coreboot.org/10108
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-05-05 22:49:11 +02:00
Stefan Reinauer f3c50d4075 3rdparty: move checkout marker forward
Move the 3rdparty marker to blobs.git commit 892a697

Change-Id: I8a51f301e08e49970b4747f004e0752617de8005
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/9625
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
Tested-by: build bot (Jenkins)
2015-04-14 01:09:51 +02:00
Marc Jones 6f713d2c5b 3rdparty: Update submodule to get Tegra 132 binaries
Change-Id: Ib5c967708e1f10e78a752ba28c02271f007fd137
Signed-off-by: Marc Jones <marc.jones@se-eng.com>
Reviewed-on: http://review.coreboot.org/8613
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2015-03-07 17:50:58 +01:00
Alexandru Gagniuc 422e296d56 3rdparty: Update to latest commit (for Intel microcode)
This pulls in the Intel microcode from blobs, and allows us to move
forward with relocating microcode updates in blobs.

Change-Id: Iaa046cc20c7825aac168a6ed97c87be548634df3
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: http://review.coreboot.org/8356
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2015-02-27 18:16:15 +01:00