Commit graph

5 commits

Author SHA1 Message Date
Marc Jones
b6ac3a2997 kahlee: Set Kahlee GPEs
Add GPE configuration table.

Remove GPE3 from the power button ASL and set the EC to GPE3(AGPIO22).

Set the EC and PCIE/WLAN SCI GPIO signals.

Set GPE ASL methods for:
  PCIE/WLAN      8h
  EHCI          18h
  XHCI          1fh
Note EC GPE3 methods are in the EC ASL.

BUG=b:63268311
BRANCH=none
TEST=Test lidswitch powers the device on and off at the login screen.

Change-Id: I27c880ee84b6797d999d4d5951602b654ede948e
Signed-off-by: Marc Jones <marcj303@gmail.com>
Reviewed-on: https://review.coreboot.org/22096
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2017-10-20 22:57:43 +00:00
Marc Jones
0a15ed57c6 google/kahlee: Add mainboard GPIOs to ACPI
Add the Google mainboard GPIOs to the ACPI table.

Change-Id: I9b5952ed3934b938cb50650890a7b434e6306fd1
Signed-off-by: Marc Jones <marcj303@gmail.com>
Reviewed-on: https://review.coreboot.org/20313
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-07-31 17:34:48 +00:00
Marc Jones
9ad593b944 google/kahlee: Move mainboard_ec_init to chip init phase
Move mainboard_ec_init out of mainboard enable to the more
appropriate mainboard init phase.

Change-Id: Ieabcecf70e4de0b42fc639d031755b6d0b66f08a
Signed-off-by: Marc Jones <marcj303@gmail.com>
Reviewed-on: https://review.coreboot.org/20312
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-07-31 17:32:51 +00:00
Marshall Dawson
beb12880a1 google/kahlee: Add ChromeOS and ChromeEC
Add the basics for building as a ChromeOS device. ChromeOS
and ChromeEC are dependent on each other, so bring them in
together. The EC is a Nuvoton and you can find additional
details in the Chromium EC repo.

Add the Google HWID "Kahlee TEST 6421".

The chromeos.fmd for Kahlee takes advantage of the AGESA
located outside cbfs and includes typical RW, VPD, and
MRC areas.

There are some updates required to depthcharge, vboot, GPIOs,
and the ChromeEC before we have a complete-ish system.

Change-Id: Ifb0a6afc01dd80ef9e7bb81039d9152936043999
Signed-off-by: Marc Jones <marcj303@gmail.com>
Reviewed-on: https://review.coreboot.org/19835
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-07-27 21:32:55 +00:00
Marc Jones
2d79f16dc8 google/kahlee: Start Kahlee mainboard
Copied from amd/gardenia. Update the appropriate board name strings.
Uses the soc/ structure.

Change-Id: Ia68b16969518f4d63d5d2dea7658a472b2daca05
Signed-off-by: Marc Jones <marcj303@gmail.com>
Reviewed-on: https://review.coreboot.org/19830
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-07-27 21:31:32 +00:00