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Werner Zeh 0099832cda soc/intel/ehl: Add Kconfig option to disable reset on TCO expiration
The TCO timer is the default watchdog of an x86 host and can reset the
system once it has expired for the second time. There are applications
where this reset is not acceptable while the TCO is used. In these
applications the TCO expire event generates an interrupt and software
takes care. There is a bit in the TCO1_CNT register on Elkhart Lake to
prevent this reset on expiration (called NO_REBOOT, see doc #636722 ).
This bit can either be strapped on hardware or set in this register to
avoid the reset on expiration. While the hardware strap cannot be
overridden in software, the pure software solution is more flexible.
Unfortunately, the location for this bit differs among the different
platforms. This is why it has to be handled on soc level rather than on
TCO common code level.

This commit adds a Kconfig option where NO_REBOOT can be enabled. This
makes it easy to reach this feature over to the mainboard where it can
be selected if needed.

Change-Id: Iaa81bfbe688edd717aa02db86f0a93fecdfcd16b
Signed-off-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61177
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2022-01-25 16:15:30 +00:00
3rdparty 3rdparty/amd_blobs: advance submodule pointer 2022-01-18 19:25:59 +00:00
Documentation Documentation: gpio: Fix table 2022-01-18 12:25:35 +00:00
LICENSES treewide: Remove trailing whitespace 2021-02-17 17:30:05 +00:00
configs configs: Add build test configs for CBFS verification 2022-01-08 00:41:18 +00:00
payloads Revert "SeaBIOS: Update stable release to 1.15.0" 2022-01-24 18:18:21 +00:00
spd spd: Add new LP5 parts and generate SPDs 2021-11-08 14:48:49 +00:00
src soc/intel/ehl: Add Kconfig option to disable reset on TCO expiration 2022-01-25 16:15:30 +00:00
tests tests: Fix tests code and comments style 2022-01-14 14:29:29 +00:00
util util/cbmem: Rebase to handle negative timestamps 2022-01-21 22:43:03 +00:00
.checkpatch.conf lint: checkpatch: Only exclude specific src/vendorcode/ subdirectories 2021-04-06 16:04:41 +00:00
.clang-format
.editorconfig
.gitignore .gitignore: Ignore .test/.dependencies globally 2020-10-31 18:21:36 +00:00
.gitmodules .gitmodules: Update intel-microcode submodule to track branch=main 2021-06-09 17:20:50 +00:00
.gitreview
AUTHORS
COPYING
MAINTAINERS MAINTAINERS: Add libpayload unit-tests to TESTS section 2021-12-16 23:46:23 +00:00
Makefile Makefile: Defer normalizing configuration for reproducible builds 2022-01-14 00:30:04 +00:00
Makefile.inc Makefile.inc: Add `-fno-pie` to `ADAFLAGS_common` 2022-01-23 18:55:16 +00:00
README.md
gnat.adc
toolchain.inc build system: immediately report what users are supposed to look into 2021-10-18 16:39:25 +00:00

README.md

coreboot README

coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.

With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.

coreboot was formerly known as LinuxBIOS.

Payloads

After the basic initialization of the hardware has been performed, any desired "payload" can be started by coreboot.

See https://www.coreboot.org/Payloads for a list of supported payloads.

Supported Hardware

coreboot supports a wide range of chipsets, devices, and mainboards.

For details please consult:

Build Requirements

  • make
  • gcc / g++ Because Linux distribution compilers tend to use lots of patches. coreboot does lots of "unusual" things in its build system, some of which break due to those patches, sometimes by gcc aborting, sometimes - and that's worse - by generating broken object code. Two options: use our toolchain (eg. make crosstools-i386) or enable the ANY_TOOLCHAIN Kconfig option if you're feeling lucky (no support in this case).
  • iasl (for targets with ACPI support)
  • pkg-config
  • libssl-dev (openssl)

Optional:

  • doxygen (for generating/viewing documentation)
  • gdb (for better debugging facilities on some targets)
  • ncurses (for make menuconfig and make nconfig)
  • flex and bison (for regenerating parsers)

Building coreboot

Please consult https://www.coreboot.org/Build_HOWTO for details.

Testing coreboot Without Modifying Your Hardware

If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.

Please see https://www.coreboot.org/QEMU for details.

Website and Mailing List

Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:

https://www.coreboot.org

You can contact us directly on the coreboot mailing list:

https://www.coreboot.org/Mailinglist

The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.

coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the "GPL (version 2, or any later version)", and some files are licensed under the "GPL, version 2". For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.

This makes the resulting coreboot images licensed under the GPL, version 2.