Martin Roth 011bf13715 soc/amd/common: Add func to clear eSPI IO & memory decode ranges ... Previously, the eSPI code would only add to existing decode ranges, and there wasn't any way to clear ranges. This clears all the ranges so the eSPI configuration can start fresh. BUG=b:183207262, b:183974365 TEST=Verify on Guybrush Signed-off-by: Martin Roth <martinroth@chromium.org> Change-Id: Ic4e67c40d34915505bdd5b431a064d2c7b6bbc70 Reviewed-on: https://review.coreboot.org/c/coreboot/+/51748 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com>		2021-04-05 00:43:55 +00:00
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cezanne	soc/amd/cezanne: Add support to perform early EC sync	2021-04-02 16:25:03 +00:00
common	soc/amd/common: Add func to clear eSPI IO & memory decode ranges	2021-04-05 00:43:55 +00:00
picasso	soc/amd/picasso/acpi: pass correct enum to acpigen_write_CSD_package	2021-03-31 21:06:33 +00:00
stoneyridge	soc/amd: add DISABLE_KEYBOARD_RESET_PIN option	2021-03-29 19:07:48 +00:00
Kconfig	soc/amd: rename common Kconfig and use wildcard for SoC-specific Kconfig	2020-11-19 14:29:14 +00:00