coreboot-kgpe-d16/src
Lee Leahy 01464a69b8 mainboard/intel: Add Skylake based RVP3 board
Initial files to support the Intel Skylake RVP3
Matches chromium tree at 927026db

This board uses the Skylake FSP 1.1 image and does not build without the
FspUpdVpd.h file.

BRANCH=none
BUG=None
TEST=Build and run on sklrvp

Change-Id: I5e7fff8f62a737e627e25c1e03e343d6167041ea
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: http://review.coreboot.org/10343
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-07-17 20:19:29 +02:00
..
acpi acpi/sata: add generic sata ssdt port generator 2015-06-07 01:24:47 +02:00
arch cbfs: hardcode file alignment 2015-07-15 16:34:37 +02:00
console consoles: remove unused infrastructure 2015-05-26 19:02:54 +02:00
cpu indent style fix for lapic_cpu_init.c 2015-07-17 17:53:06 +02:00
device x86 realmode: Set up the 8254 timer before running option rom 2015-07-16 04:03:45 +02:00
drivers Verify Kconfigs symbols are not zero for hex and int type symbols 2015-07-12 19:06:44 +02:00
ec ec/lenovo/h8: silence sound on boot 2015-07-07 02:40:50 +02:00
include cbfs: hardcode file alignment 2015-07-15 16:34:37 +02:00
lib cbfs: hardcode file alignment 2015-07-15 16:34:37 +02:00
mainboard mainboard/intel: Add Skylake based RVP3 board 2015-07-17 20:19:29 +02:00
northbridge Remove unused Kconfig symbols in c code 2015-07-17 13:36:37 +02:00
soc t210: new sdram_lp0_save_params() function 2015-07-16 22:39:33 +02:00
southbridge azalia: fix up and clean up shrinkage of boilerplate code 2015-07-14 13:40:07 +02:00
superio superio/smsc: Add support for SMSC DME1737 2015-07-13 17:11:00 +02:00
vendorcode cbfs: hardcode file alignment 2015-07-15 16:34:37 +02:00
Kconfig riscv-emulation: Set stack size to 0 in Kconfig 2015-07-14 16:56:25 +02:00