coreboot-kgpe-d16/src/mainboard
Vladimir Serbinenko 01d06dc67b ROMSIZE: Add option for 12M chips.
On X230 2 real chips (8 + 4) are merged into one virtual 12M chip.

Change-Id: I49c251b1777fc9edccebc4a204b9c4a087bf2a8e
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/4688
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2014-01-15 16:35:53 +01:00
..
a-trend x86: Unify arch/io.h and arch/romcc_io.h 2013-03-22 00:00:09 +01:00
aaeon AMD Northbridge LX: get rid of #include "northbridge/amd/lx/raminit.c" 2013-06-04 17:56:48 +02:00
abit x86: Unify arch/io.h and arch/romcc_io.h 2013-03-22 00:00:09 +01:00
adlink FrontRunner/Toucan-AF: boards will be renamed to fit ADLINK scheme 2013-04-09 23:56:14 +02:00
advansus AMD fam10: Drop RAMINIT_SYSINFO 2013-12-29 19:45:41 +01:00
advantech x86: Unify arch/io.h and arch/romcc_io.h 2013-03-22 00:00:09 +01:00
amd Re-declare CACHE_ROM_SIZE as aligned ROM_SIZE for MTRR 2014-01-15 15:26:48 +01:00
aopen usbdebug: Quirk for board aopen/dxplplusu 2013-06-12 05:22:46 +02:00
arima AMD boards (non-AGESA): Cleanup post_cache_as_ram.c includes 2013-12-26 23:22:17 +01:00
artecgroup AMD Northbridge LX: get rid of #include "northbridge/amd/lx/raminit.c" 2013-06-04 17:56:48 +02:00
asi x86: Unify arch/io.h and arch/romcc_io.h 2013-03-22 00:00:09 +01:00
asrock Re-declare CACHE_ROM_SIZE as aligned ROM_SIZE for MTRR 2014-01-15 15:26:48 +01:00
asus Re-declare CACHE_ROM_SIZE as aligned ROM_SIZE for MTRR 2014-01-15 15:26:48 +01:00
avalue AMD fam10: Drop RAMINIT_SYSINFO 2013-12-29 19:45:41 +01:00
axus x86: Unify arch/io.h and arch/romcc_io.h 2013-03-22 00:00:09 +01:00
azza x86: Unify arch/io.h and arch/romcc_io.h 2013-03-22 00:00:09 +01:00
bachmann OT200: bring LEDs into a defined state 2013-06-10 08:45:50 +02:00
bcom x86: Unify arch/io.h and arch/romcc_io.h 2013-03-22 00:00:09 +01:00
bifferos x86: Unify arch/io.h and arch/romcc_io.h 2013-03-22 00:00:09 +01:00
biostar x86: Unify arch/io.h and arch/romcc_io.h 2013-03-22 00:00:09 +01:00
broadcom AMD boards (non-AGESA): Cleanup post_cache_as_ram.c includes 2013-12-26 23:22:17 +01:00
compaq x86: Unify arch/io.h and arch/romcc_io.h 2013-03-22 00:00:09 +01:00
cubietech cubieboard: Setup CPU clock in romstage and load ramstage 2014-01-14 14:15:12 +01:00
digitallogic AMD Northbridge LX: get rid of #include "northbridge/amd/lx/raminit.c" 2013-06-04 17:56:48 +02:00
dmp vortex86ex: Cleanup earlymtrr.c include 2013-12-26 23:18:28 +01:00
eaglelion x86: Unify arch/io.h and arch/romcc_io.h 2013-03-22 00:00:09 +01:00
ecs GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« 2013-03-01 10:16:08 +01:00
emulation armv7: Remove SYS_TEXT_BASE config. 2013-12-20 21:56:20 +01:00
getac smi: Update mainboard_smi_gpi() to have 32bit argument 2013-11-24 07:40:22 +01:00
gigabyte AMD K8 (rev F): Move rev F0/F1 workaround to header 2013-12-30 07:20:38 +01:00
gizmosphere Re-declare CACHE_ROM_SIZE as aligned ROM_SIZE for MTRR 2014-01-15 15:26:48 +01:00
google Intel (sandy/ivy): Avoid calling cbmem_initialize() twice 2014-01-15 15:33:54 +01:00
hp AMD K8 (rev F): Move rev F0/F1 workaround to header 2013-12-30 07:20:38 +01:00
ibase Remove PCI_ROM_RUN option 2013-12-24 14:40:49 +01:00
ibm AMD boards (non-AGESA): Cleanup post_cache_as_ram.c includes 2013-12-26 23:22:17 +01:00
iei AMD fam10: Drop RAMINIT_SYSINFO 2013-12-29 19:45:41 +01:00
intel Intel (sandy/ivy): Avoid calling cbmem_initialize() twice 2014-01-15 15:33:54 +01:00
iwave Move select MMCONF_SUPPORT under northbridge 2013-07-03 19:34:11 +02:00
iwill AMD K8 (pre-F): Clean platforms without K8_REV_F_SUPPORT 2013-12-30 07:15:27 +01:00
jetway AMD fam10: Drop RAMINIT_SYSINFO 2013-12-29 19:45:41 +01:00
kontron Intel (sandy/ivy): Avoid calling cbmem_initialize() twice 2014-01-15 15:33:54 +01:00
lanner x86: Unify arch/io.h and arch/romcc_io.h 2013-03-22 00:00:09 +01:00
lenovo X60: Enable WWAN by default. 2014-01-12 18:06:38 +01:00
lippert Re-declare CACHE_ROM_SIZE as aligned ROM_SIZE for MTRR 2014-01-15 15:26:48 +01:00
mitac GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« 2013-03-01 10:16:08 +01:00
msi AMD K8 (rev F): Move rev F0/F1 workaround to header 2013-12-30 07:20:38 +01:00
nec GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« 2013-03-01 10:16:08 +01:00
newisys AMD K8: Socket implies K8_REV_F_SUPPORT 2013-12-29 00:04:02 +01:00
nokia x86: Unify arch/io.h and arch/romcc_io.h 2013-03-22 00:00:09 +01:00
nvidia AMD K8 (rev F): Move rev F0/F1 workaround to header 2013-12-30 07:20:38 +01:00
pcengines PC Engines ALIX.1C: Add CMOS defaults. 2013-06-04 21:31:57 +02:00
rca x86: Unify arch/io.h and arch/romcc_io.h 2013-03-22 00:00:09 +01:00
roda Remove PCI_ROM_RUN option 2013-12-24 14:40:49 +01:00
samsung Intel (sandy/ivy): Avoid calling cbmem_initialize() twice 2014-01-15 15:33:54 +01:00
siemens AMD K8 (rev-F): Always have RAMINIT_SYSINFO 2013-12-29 19:45:50 +01:00
soyo x86: Unify arch/io.h and arch/romcc_io.h 2013-03-22 00:00:09 +01:00
sunw AMD K8: Socket implies K8_REV_F_SUPPORT 2013-12-29 00:04:02 +01:00
supermicro Re-declare CACHE_ROM_SIZE as aligned ROM_SIZE for MTRR 2014-01-15 15:26:48 +01:00
technexion AMD K8 (rev-F): Always have RAMINIT_SYSINFO 2013-12-29 19:45:50 +01:00
technologic x86: Unify arch/io.h and arch/romcc_io.h 2013-03-22 00:00:09 +01:00
televideo x86: Unify arch/io.h and arch/romcc_io.h 2013-03-22 00:00:09 +01:00
thomson Remove PCI_ROM_RUN option 2013-12-24 14:40:49 +01:00
ti beaglebone: Stop reinitializing the console in bootblock.c. 2013-09-17 01:00:39 +02:00
traverse AMD Northbridge LX: get rid of #include "northbridge/amd/lx/raminit.c" 2013-06-04 17:56:48 +02:00
tyan Re-declare CACHE_ROM_SIZE as aligned ROM_SIZE for MTRR 2014-01-15 15:26:48 +01:00
via via/epia-m700: Drop RAMINIT_SYSINFO 2013-12-29 19:45:29 +01:00
winent AMD boards (non-AGESA): Cleanup post_cache_as_ram.c includes 2013-12-26 23:22:17 +01:00
wyse GPLv2 notice: Unify all files to just use one space in »MA 02110-1301« 2013-03-01 10:16:08 +01:00
Kconfig ROMSIZE: Add option for 12M chips. 2014-01-15 16:35:53 +01:00