Lijian Zhao 025e0ccc59 intel/fsp: Update cannonlake FSP header ... Update cannonlake FSP header file to revision 7.x.15.46. The following item had been updated: 1. Remove/Hide restricted structure. 2. Add EBR as extention of RMT features. 3. Add cpu wakeup timer UPD. 4. Remove XHCI access lock UPD. TEST=NONE Change-Id: I065edbeffdaf555ea7d54ec3fdce56d026789c52 Signed-off-by: Lijian Zhao <lijian.zhao@intel.com> Reviewed-on: https://review.coreboot.org/22052 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>		2017-10-19 19:56:06 +00:00
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amd	src/vendorcode/amd: Use AR variable in Makefiles	2017-10-19 14:03:51 +00:00
google	Rename __attribute__((packed)) --> __packed	2017-07-13 19:45:59 +00:00
intel	intel/fsp: Update cannonlake FSP header	2017-10-19 19:56:06 +00:00
siemens	vendorcode/siemens: Add LegacyDelay to hwilib	2017-09-13 16:22:26 +00:00
Makefile.inc	vendorcode/siemens: Add hwilib for Siemens specific info struct	2016-04-28 08:15:47 +02:00