coreboot-kgpe-d16/src/soc
Aaron Durbin 02b3243dd3 skylake: honor pcie root port settings already in chip.h
For some unkonwn reason the pcie root port settings weren't
being honored in the device tree. Fix that omission.

BUG=chrome-os-partner:41861
BRANCH=None
TEST=Built with CONFIG_DISPLAY_UPD_DATA and noted devicetree
     settings were being honored.

Change-Id: Id880eca57544efb13f5cbbc06b2634c86b7c5d29
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 2d00e68ce6cfcb3d63d69848f4a8ce232f6c1257
Original-Change-Id: Idd37d65374842294f4b0c91eb841c6d1d93e92ee
Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/285027
Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: http://review.coreboot.org/10987
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2015-07-21 20:05:50 +02:00
..
broadcom/cygnus Change #ifdef and #if defined CONFIG_ bools to #if IS_ENABLED() 2015-07-12 18:14:23 +02:00
imgtec/pistachio Remove address from GPLv2 headers 2015-06-24 07:09:24 +02:00
intel skylake: honor pcie root port settings already in chip.h 2015-07-21 20:05:50 +02:00
marvell/bg4cd marvel/bg4cd: move timestamp init to SoC code 2015-07-07 20:07:41 +02:00
nvidia t210: new sdram_lp0_save_params() function 2015-07-16 22:39:33 +02:00
qualcomm/ipq806x ipq8064: enable timestamp collection 2015-07-09 00:11:37 +02:00
rockchip/rk3288 rk3288: Fix & vs && mix up in hdmi driver 2015-07-09 00:31:14 +02:00
samsung Remove empty lines at end of file 2015-06-08 00:55:07 +02:00
ucb/riscv Remove address from GPLv2 headers 2015-05-21 20:50:25 +02:00