Kyösti Mälkki 035876c4dd mb/intel/saddlebrook: Fix 2nd DIMM slot ... Assumed broken during review and rebase. The SPD at address 0x52 will appear at index 1. Change-Id: I213853d2b981294554d8d1b254da476905a41c13 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/31630 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: PraveenX Hodagatta Pranesh <praveenx.hodagatta.pranesh@intel.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com>		2019-02-28 10:35:22 +00:00
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acpi
arch	ACPI: Fill asl_compiler_revision field left empty	2019-02-26 17:53:31 +00:00
commonlib	commonlib: Add Bubble sort algorithm	2019-02-26 11:14:41 +00:00
console	console: Split loglevel for fast and slow	2019-02-27 11:10:00 +00:00
cpu	security/vboot: Add measured boot mode	2019-02-25 22:29:16 +00:00
device	src/device/Kconfig: Change default VESA mode from 117h to 118h	2019-02-25 11:21:19 +00:00
drivers	drivers/intel/fsp2_0: Update dependency of USE_FSP_REPO	2019-02-23 14:25:31 +00:00
ec	ec/google/chromeec: fix the error status passing	2019-02-27 11:08:18 +00:00
include	soc/intel/cannonlake: Add Comet Lake U SA 2+2 Device ID	2019-02-28 02:22:11 +00:00
lib	rtc: Fix rtc_calc_weekday	2019-02-27 11:07:11 +00:00
mainboard	mb/intel/saddlebrook: Fix 2nd DIMM slot	2019-02-28 10:35:22 +00:00
northbridge	nb/intel/nehalem: Remove CAR_GLOBAL use	2019-02-12 22:16:42 +00:00
security	console: Refactor printk() varargs prototypes	2019-02-27 11:09:31 +00:00
soc	intel/spi: Switch to native PCI config accessors	2019-02-28 10:34:43 +00:00
southbridge	intel/spi: Switch to native PCI config accessors	2019-02-28 10:34:43 +00:00
superio	superio/nsc/pc87417: Use common early_serial	2019-02-14 07:54:55 +00:00
vendorcode	AGESA vendorcode: Define libagesa rule just once	2019-02-25 11:16:52 +00:00
Kconfig	Kconfig: Add system type entries for common enclosures	2019-02-05 16:03:29 +00:00