Aaron Durbin 08e842c0d1 Kconfig: rename BOOT_MEDIA_SPI_BUS to BOOT_DEVICE_SPI_FLASH_BUS ... Provide a default value of 0 in drivers/spi as there weren't default values aside from specific mainboards and arch/x86. Remove any default 0 values while noting to keep the option's default to 0. BUG=chrome-os-partner:56151 Change-Id: If9ef585e011a46b5cd152a03e41d545b36355a61 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/16192 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Martin Roth <martinroth@google.com>		2016-08-18 22:04:34 +02:00
..
sdram_inf	Add newlines at the end of all coreboot files	2016-08-01 21:43:56 +02:00
board.h
board_info.txt	google/intel mainboards: Add missing board_info.txt files	2016-03-25 20:52:04 +01:00
boardid.c
bootblock.c	Kconfig: rename BOOT_MEDIA_SPI_BUS to BOOT_DEVICE_SPI_FLASH_BUS	2016-08-18 22:04:34 +02:00
chromeos.c	Remove non-ascii & unprintable characters	2016-08-01 21:44:45 +02:00
chromeos.fmd	chromeos.fmd: Mark RW_LEGACY as CBFS	2016-04-05 13:37:31 +02:00
devicetree.cb
Kconfig	Kconfig: rename BOOT_MEDIA_SPI_BUS to BOOT_DEVICE_SPI_FLASH_BUS	2016-08-18 22:04:34 +02:00
Kconfig.name
mainboard.c	chromeos: Clean up elog handling	2016-07-28 00:40:03 +02:00
Makefile.inc
memlayout.ld	mainboard/google: Update license headers	2016-04-13 17:34:04 +02:00
reset.c
romstage.c	veyron: Add exception_init() to romstage	2016-06-08 23:21:18 +02:00
sdram_configs.c	google/veyron_*: Add dual-rank 2GB Hynix module to SDRAM configs	2016-01-22 12:59:11 +01:00