coreboot-kgpe-d16/src/soc
Philipp Hug e0568595ee soc/sifive: fix compiler warning
Fix the following compiler warning on the latest toolchain:
src/soc/sifive/fu540/otp.c:48:1: error: useless storage class specifier in empty declaration [-Werror]
 } __packed;
 ^

Change-Id: Ice87c821de7650ac547394efa2a4bcc5ae1ea668
Signed-off-by: Philipp Hug <philipp@hug.cx>
Reviewed-on: https://review.coreboot.org/28553
Tested-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-09-10 20:37:17 +00:00
..
amd amd/stoneyridge: Construct ACPI BERT table 2018-09-07 14:52:53 +00:00
broadcom soc/broadcom/cygnus: Increase romstage SRAM size in memlayout 2018-08-13 12:16:32 +00:00
cavium soc/cn81xx: Add vboot support 2018-08-24 12:29:28 +00:00
imgtec soc/imgtec/pistachio: Get rid of device_t 2018-06-04 09:18:19 +00:00
intel soc/intel/cannonlake: Correct number of root ports for CNL PCH H 2018-09-10 15:04:32 +00:00
lowrisc soc/sifive/fu540: Makefile: include mtime_init in ramstage 2018-09-10 20:36:45 +00:00
mediatek mediatek: Refactor memory test code among similar SoCs 2018-09-06 10:29:39 +00:00
nvidia complier.h: add __noreturn and use it in code base 2018-09-10 15:02:51 +00:00
qualcomm drivers/i2c: Add i2c TPM support for different stages 2018-08-10 23:25:52 +00:00
rockchip drivers/i2c: Add i2c TPM support for different stages 2018-08-10 23:25:52 +00:00
samsung src: Fix typo 2018-08-10 21:25:53 +00:00
sifive soc/sifive: fix compiler warning 2018-09-10 20:37:17 +00:00
ucb soc/sifive/fu540: Makefile: include mtime_init in ramstage 2018-09-10 20:36:45 +00:00