647e385187
Tested on Intel D510MO Before this patch, I was unable to get the SATA controller into AHCI mode. That is, I could never see PCI ID 8086:27c1 appearing on the bus. With sata_ahci set, controller now goes into AHCI mode and works. 8086:27c1 Tested on X60 with AHCI enabled 8086:27c5 (AHCI mode for mobile ich7) No regressions detected. Change-Id: I4a3eabb5773106a0825fa2f30ee400fbfe636c7f Signed-off-by: Damien Zammit <damien@zamaudio.com> Reviewed-on: https://review.coreboot.org/12923 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber <nico.h@gmx.de>
45 lines
1.2 KiB
C
45 lines
1.2 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2008-2009 coresystems GmbH
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; version 2 of
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* the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <console/console.h>
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#include <device/device.h>
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#include <device/pci.h>
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#include "i82801gx.h"
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#include "sata.h"
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#if !CONFIG_MMCONF_SUPPORT_DEFAULT
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#error ICH7 requires CONFIG_MMCONF_SUPPORT_DEFAULT
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#endif
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void i82801gx_enable(device_t dev)
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{
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u32 reg32;
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/* Enable SERR */
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reg32 = pci_read_config32(dev, PCI_COMMAND);
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reg32 |= PCI_COMMAND_SERR;
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pci_write_config32(dev, PCI_COMMAND, reg32);
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if (dev->path.pci.devfn == PCI_DEVFN(31, 2)) {
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printk(BIOS_DEBUG, "Set SATA mode early\n");
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sata_enable(dev);
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}
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}
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struct chip_operations southbridge_intel_i82801gx_ops = {
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CHIP_NAME("Intel ICH7/ICH7-M (82801Gx) Series Southbridge")
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.enable_dev = i82801gx_enable,
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};
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