Hung-Te Lin 0682cfefdb armv7/exynos5420: Configure CPU cores for kernel to enable SMP. ... The SMP on Exynos 5420 requires setting a special page and entry wrappers in firmware side (SRAM) so kernel can start cores (and to switch clusters). Change-Id: I77ca98bb6cff5b13e95dd29228e4536302f0aee9 Signed-off-by: Hung-Te Lin <hungte@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/64770 Reviewed-by: Ronald G. Minnich <rminnich@chromium.org> (cherry picked from commit 4a11c7ab78cc0811df0f88763b0af8b9f24e5433) Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com> Reviewed-on: http://review.coreboot.org/6405 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>		2014-07-31 18:31:53 +02:00
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allwinner	src: Make use of 'CEIL_DIV(a, b)' macro across tree	2014-07-11 08:39:07 +02:00
amd	model_fxx/processor_name.c, hudson/lpc.c: add missing break statements	2014-07-30 10:35:27 +02:00
armltd	Introduce stage-specific architecture for coreboot	2014-05-06 20:23:31 +02:00
dmp	Introduce stage-specific architecture for coreboot	2014-05-06 20:23:31 +02:00
intel	model_206ax_init.c: Trivial - fix indent	2014-07-30 23:33:35 +02:00
qemu-x86	Introduce stage-specific architecture for coreboot	2014-05-06 20:23:31 +02:00
samsung	armv7/exynos5420: Configure CPU cores for kernel to enable SMP.	2014-07-31 18:31:53 +02:00
ti	Introduce stage-specific architecture for coreboot	2014-05-06 20:23:31 +02:00
via	Drop redundant select CACHE_AS_RAM	2014-07-05 11:33:23 +02:00
x86	sandy/ivybridge: Native raminit.	2014-07-29 00:52:28 +02:00
Kconfig	Move ARCH_* from board/Kconfig to cpu or soc Kconfig.	2014-05-03 00:25:20 +02:00
Makefile.inc	Introduce stage-specific architecture for coreboot	2014-05-06 20:23:31 +02:00