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coreboot-kgpe-d16/src/northbridge
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Stefan Reinauer 0819a47d14 northbridge/intel/gm45: Use TSC for ramstage timer per default 
This is a step towards isolating the timer drivers.

Change-Id: I4c9349054be0cf520cd4407be9fb393b664223a4
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/13922
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-03-09 17:04:21 +01:00
..
amd nb/amd/amdmct: Add socket specific configuration for FM2 2016-02-19 21:27:35 +01:00
dmp/vortex86ex tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00
intel northbridge/intel/gm45: Use TSC for ramstage timer per default 2016-03-09 17:04:21 +01:00
rdc/r8610 tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00
via drivers/pc80: Add PS/2 mouse presence detect 2016-02-01 22:10:46 +01:00