09133c78dd
Add Silicon upd settings for LPSS (GSPI/UART/I2C). Signed-off-by: Lean Sheng Tan <lean.sheng.tan@intel.com> Change-Id: Ib0c3cd1d37ff9892d09d6d86ac50e230549c7e53 Reviewed-on: https://review.coreboot.org/c/coreboot/+/54959 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Werner Zeh <werner.zeh@siemens.com> |
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alderlake | ||
apollolake | ||
baytrail | ||
braswell | ||
broadwell | ||
cannonlake | ||
common | ||
denverton_ns | ||
elkhartlake | ||
icelake | ||
jasperlake | ||
quark | ||
skylake | ||
tigerlake | ||
xeon_sp | ||
Kconfig |