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Yidi Lin 09634d0328 google/oak: gpio: update RAM ID pins for Rowan
RAMD_ID_1 moves to PAD_DSI_TE and RAM_ID_2 moves to PAD_RDP1_A on Rowan.

BUG=chrome-os-partner:62672
BRANCH=none
TEST=emerge-rowan coreboot

Change-Id: Iae44934d8d669d696b83f9d3e3450a0e408fe062
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Gerrit-Rebase-Ignore-CLs-Before: https://chromium-review.googlesource.com/539234
Ignore-CL-Reviewed-on: https://chromium-review.googlesource.com/388068
Ignore-CL-Reviewed-on: https://chromium-review.googlesource.com/453778
Ignore-CL-Reviewed-on: https://chromium-review.googlesource.com/454921
Ignore-CL-Reviewed-on: https://chromium-review.googlesource.com/455118
Ignore-CL-Reviewed-on: https://chromium-review.googlesource.com/479613
Ignore-CL-Reviewed-on: https://chromium-review.googlesource.com/487023
Ignore-CL-Reviewed-on: https://chromium-review.googlesource.com/498587
Ignore-CL-Reviewed-on: https://chromium-review.googlesource.com/506785
Ignore-CL-Reviewed-on: https://chromium-review.googlesource.com/520572
Original-Commit-Id: 4da19b3c00578f96ec933cff9ad0c9988a4c4a30
Original-Change-Id: I64fd29de607a0b360d355fd3724e3a649adc658b
Original-Signed-off-by: Yidi Lin <yidi.lin@mediatek.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/448397
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/18583
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
2017-06-19 18:43:23 +02:00
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README

-------------------------------------------------------------------------------
coreboot README
-------------------------------------------------------------------------------

coreboot is a Free Software project aimed at replacing the proprietary BIOS
(firmware) found in most computers.  coreboot performs a little bit of
hardware initialization and then executes additional boot logic, called a
payload.

With the separation of hardware initialization and later boot logic,
coreboot can scale from specialized applications that run directly
firmware, run operating systems in flash, load custom
bootloaders, or implement firmware standards, like PC BIOS services or
UEFI. This allows for systems to only include the features necessary
in the target application, reducing the amount of code and flash space
required.

coreboot was formerly known as LinuxBIOS.


Payloads
--------

After the basic initialization of the hardware has been performed, any
desired "payload" can be started by coreboot.

See https://www.coreboot.org/Payloads for a list of supported payloads.


Supported Hardware
------------------

coreboot supports a wide range of chipsets, devices, and mainboards.

For details please consult:

 * https://www.coreboot.org/Supported_Motherboards
 * https://www.coreboot.org/Supported_Chipsets_and_Devices


Build Requirements
------------------

 * make
 * gcc / g++
   Because Linux distribution compilers tend to use lots of patches. coreboot
   does lots of "unusual" things in its build system, some of which break due
   to those patches, sometimes by gcc aborting, sometimes - and that's worse -
   by generating broken object code.
   Two options: use our toolchain (eg. make crosstools-i386) or enable the
   ANY_TOOLCHAIN Kconfig option if you're feeling lucky (no support in this
   case).
 * iasl (for targets with ACPI support)

Optional:

 * doxygen (for generating/viewing documentation)
 * gdb (for better debugging facilities on some targets)
 * ncurses (for 'make menuconfig' and 'make nconfig')
 * flex and bison (for regenerating parsers)


Building coreboot
-----------------

Please consult https://www.coreboot.org/Build_HOWTO for details.


Testing coreboot Without Modifying Your Hardware
------------------------------------------------

If you want to test coreboot without any risks before you really decide
to use it on your hardware, you can use the QEMU system emulator to run
coreboot virtually in QEMU.

Please see https://www.coreboot.org/QEMU for details.


Website and Mailing List
------------------------

Further details on the project, a FAQ, many HOWTOs, news, development
guidelines and more can be found on the coreboot website:

  https://www.coreboot.org

You can contact us directly on the coreboot mailing list:

  https://www.coreboot.org/Mailinglist


Copyright and License
---------------------

The copyright on coreboot is owned by quite a large number of individual
developers and companies. Please check the individual source files for details.

coreboot is licensed under the terms of the GNU General Public License (GPL).
Some files are licensed under the "GPL (version 2, or any later version)",
and some files are licensed under the "GPL, version 2". For some parts, which
were derived from other projects, other (GPL-compatible) licenses may apply.
Please check the individual source files for details.

This makes the resulting coreboot images licensed under the GPL, version 2.