coreboot-kgpe-d16/src/soc
Sourabh Banerjee 0bd22ce82c ipq806x: clear the RPM initialization Acknowledge bit
The RPM initialization Acknowledge is cleared by writing 1
into bit-10 of the RPM_INT_ACK register.

The existing code got it wrong and is writing zero to that bit.

BRANCH=storm
BUG=chrome-os-partner:39231
TEST=with this patch and an RPM firmware update, an SP4 device
     survived more than 1000 reboots in a row.

Change-Id: Ibba296ed0571ad9403a0c51c7f82f07f185b4e83
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 13b4a0f093ba652ad6bccdfc4b3686c0741c6fe7
Original-Change-Id: I39e6ea50e0f66b4af68bdb868dd4437c34bb4524
Original-Signed-off-by: Viswanath Kraleti <vkraleti@codeaurora.org>
Original-Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/266969
Original-Reviewed-by: Manoj Juneja <mjuneja@qti.qualcomm.com>
Reviewed-on: http://review.coreboot.org/10310
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2015-06-02 11:40:34 +02:00
..
broadcom/cygnus Remove address from GPLv2 headers 2015-05-21 20:50:25 +02:00
imgtec/pistachio pistashio: bump up romstage size 2015-05-26 22:09:34 +02:00
intel intel/broadwell: Hide use of acpi_slp_type 2015-05-29 17:05:08 +02:00
marvell/bg4cd Remove address from GPLv2 headers 2015-05-21 20:50:25 +02:00
nvidia coreboot: introduce boot_device 2015-05-26 22:32:47 +02:00
qualcomm/ipq806x ipq806x: clear the RPM initialization Acknowledge bit 2015-06-02 11:40:34 +02:00
rockchip/rk3288 Remove address from GPLv2 headers 2015-05-21 20:50:25 +02:00
samsung coreboot: introduce boot_device 2015-05-26 22:32:47 +02:00
ucb/riscv Remove address from GPLv2 headers 2015-05-21 20:50:25 +02:00