coreboot-kgpe-d16/src/mainboard/intel/coffeelake_rvp
Philip Chen 0d4200fef3 soc/intel/cannonlake: Support different SPD read type for each slot
Also clean up cannonlake_memcfg_init.

The major changes include:
(1) Add enum 'mem_info_read_type' to spd_info.
(2) Add per-dimm-slot spd_info to cnl_mb_cfg.
(3) Setup memory config for each slot independently.
(4) Squash meminit_memcfg_spd().

BUG=chromium:960581, b:124990009
BRANCH=none
TEST=boot hatch, hatch_whl, and kohaku

Change-Id: I686a85996858204c20fd05ef24787a0487817c34
Signed-off-by: Philip Chen <philipchen@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32513
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-05-15 17:47:13 +00:00
..
variants Replace remaining IS_ENABLED(CONFIG_*) with CONFIG() 2019-04-08 18:50:10 +00:00
acpi_tables.c
board_info.txt
bootblock.c mb/intel/coffeelake_rvp: Remove superfluous header file 2018-08-25 10:17:33 +00:00
chromeos.c mainboard: remove "recovery" gpio, selectively add "presence" gpio. 2019-05-13 09:21:51 +00:00
chromeos.fmd mainboard: Enable PRESERVE flag in all vboot/chromeos FMD files 2019-03-05 20:52:06 +00:00
chromeos_32MB.fmd mainboard: Enable PRESERVE flag in all vboot/chromeos FMD files 2019-03-05 20:52:06 +00:00
dsdt.asl coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX) 2019-03-08 08:33:24 +00:00
hda_verb.c mb/intel/coffeelake_rvp: Add HDA controller driver support for coffee lake 2018-10-19 09:15:26 +00:00
Kconfig mb/intel/coffeelake_rvp: remove double selection in Kconfig 2019-03-19 21:37:52 +00:00
Kconfig.name mb/intel/coffeelake_rvp: Add cml_u board support 2019-03-18 06:20:34 +00:00
mainboard.c mb/intel/coffeelake_rvp: Remove superfluous header file 2018-08-25 10:17:33 +00:00
Makefile.inc mb/intel/coffeelake_rvp: Add HDA controller driver support for coffee lake 2018-10-19 09:15:26 +00:00
memory.c soc/intel/cannonlake: Support different SPD read type for each slot 2019-05-15 17:47:13 +00:00
romstage.c soc/intel/cannonlake: Support different SPD read type for each slot 2019-05-15 17:47:13 +00:00