Matt DeVillier 0da3a8a91b soc/intel/baytrail: set default VBIOS filename and PCI ID ... All Baytrail boards have the same GPU PCI ID, so set it here to avoid having to set it in each board's config. Move the VGA_BIOS_FILE config from google/rambi into soc/baytrail since it likewise applies to all Baytrail boards. Change-Id: Id1e0580b55e3590d868cb839987f06c49bb07cf5 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33026 Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2019-06-02 22:26:34 +00:00
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acpi
spd
variants	google/clapper: fix up devicetree	2019-05-29 20:10:58 +00:00
acpi_tables.c	src: Use 'include <string.h>' when appropriate	2019-03-20 20:27:51 +00:00
board_info.txt
chromeos.c	mainboard: remove "recovery" gpio, selectively add "presence" gpio.	2019-05-13 09:21:51 +00:00
chromeos.fmd	mainboard: Enable PRESERVE flag in all vboot/chromeos FMD files	2019-03-05 20:52:06 +00:00
cmos.layout
dsdt.asl	cpu/intel/common: Use a common acpi/cpu.asl file	2018-11-30 22:02:35 +00:00
ec.c
ec.h
fadt.c	ACPI: Rename FADT model and set it to zero	2019-03-01 10:02:29 +00:00
irqroute.c
irqroute.h
Kconfig	soc/intel/baytrail: set default VBIOS filename and PCI ID	2019-06-02 22:26:34 +00:00
Kconfig.name
mainboard.c	src/mainboard/google: Adopt Mainboards to changed Type41 Func	2019-05-23 08:14:44 +00:00
mainboard_smi.c	coreboot: Replace all IS_ENABLED(CONFIG_XXX) with CONFIG(XXX)	2019-03-08 08:33:24 +00:00
Makefile.inc
romstage.c	src: Use 'include <string.h>' when appropriate	2019-03-20 20:27:51 +00:00
w25q64.c