coreboot-kgpe-d16/src/superio
Christopher Kilgour 7bc63fd2cb This trivial patch adds the SMSC SCH3112 Super I/O chip ID to the
generic SMSC support, and corrects a small typo.

With this patch, coreboot v2 on a mainboard with SCH3112 has been
demonstrated to correctly use the serial port.  No other chip
functions were tested.

Signed-off-by: Christopher Kilgour <techie@whiterocker.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3244 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-04-19 13:32:19 +00:00
..
fintek/f71805f Please bear with me - another rename checkin. This qualifies as trivial, no 2008-01-18 10:35:56 +00:00
intel/i3100 This patch implements support for the Intel 3100 integrated SuperIO and UART. 2008-03-16 23:31:04 +00:00
ite Temporarily disable the fan control patch from this morning; it turns out to 2008-02-26 04:36:52 +00:00
nsc Please bear with me - another rename checkin. This qualifies as trivial, no 2008-01-18 10:35:56 +00:00
smsc This trivial patch adds the SMSC SCH3112 Super I/O chip ID to the 2008-04-19 13:32:19 +00:00
via/vt1211 Use the canonical name of the vendors/devices and the 2006-11-05 18:50:49 +00:00
winbond This patch introduces virtual LDNs changes for W83627EHF driver. Not only LDN 7 and 9 are 2008-02-18 20:37:49 +00:00