Raul E Rangel a96482acd3 arch/x86/boot: Add missing include ... This file uses the asmlinkage macro. BUG=b:179699789 TEST=build guybrush Signed-off-by: Raul E Rangel <rrangel@chromium.org> Change-Id: Id5b73c174aa946b8205b4172609729b0548cbd8c Reviewed-on: https://review.coreboot.org/c/coreboot/+/57567 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>		2021-09-13 14:18:43 +00:00
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acpi	acpigen: Add ability to auto-generate _DSM Function 0	2021-09-10 19:39:09 +00:00
arch	arch/x86/boot: Add missing include	2021-09-13 14:18:43 +00:00
commonlib	elog: move MAX_EVENT_SIZE to commonlib/bsd/include	2021-09-10 22:53:19 +00:00
console	console/hw-debug_sink: Update for fast/slow console distinction	2021-08-04 15:15:45 +00:00
cpu	cpu/x86/tsc: Deduplicate Makefile logic	2021-09-08 14:35:16 +00:00
device	device/dram: Add addtional LPDDR4 speed grades	2021-09-13 13:47:31 +00:00
drivers	SMBIOS: Allow skipping default SMBIOS generation	2021-09-13 13:54:03 +00:00
ec	ec/acpi: Remove empty "chip" driver	2021-09-08 18:48:53 +00:00
include	SMBIOS: Allow skipping default SMBIOS generation	2021-09-13 13:54:03 +00:00
lib	Move post_codes.h to commonlib/console/	2021-08-04 15:15:51 +00:00
mainboard	mb/adlrvp: Add new ADL P board variant for MCHP1727	2021-09-13 13:59:45 +00:00
northbridge	nb/intel/haswell: Move MRC glue code into a subfolder	2021-08-02 14:59:45 +00:00
security	vboot/secdata_tpm: Add WRITE_STCLEAR attr to RW ARB spaces	2021-07-26 07:27:48 +00:00
soc	soc/amd/common/block/cpu: Add missing include	2021-09-13 14:17:15 +00:00
southbridge	sb/intel/lynxpoint: Drop config_t typedef	2021-09-09 14:38:21 +00:00
superio	superio/nuvoton/nct6776: Correct the definition of NCT6776_GPIOBASE	2021-08-29 16:41:12 +00:00
vendorcode	vendorcode/intel/fsp: Add Alder Lake FSP headers for FSP v2347_00	2021-09-10 23:00:26 +00:00
Kconfig