Kyösti Mälkki 157b189f6b cpu/intel: Enter romstage without BIST ... When entry to romstage is via cpu/intel/car/romstage.c BIST has not been passed down the path for sometime. Change-Id: I345975c53014902269cee21fc393331d33a84dce Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34908 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>		2019-08-18 19:03:22 +00:00
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acpi
acpi_tables.c	mb/lenovo: Unify thermal threshold handling	2019-05-25 12:10:49 +00:00
board_info.txt
cmos.default
cmos.layout	mb/lenovo/z61t: Remove fn_ctrl_swap option	2019-06-25 07:58:43 +00:00
data.vbt
devicetree.cb	sb/intel/i82801gx: Detect if the southbridge supports AHCI	2019-06-06 10:38:22 +00:00
dock.c
dock.h
dsdt.asl
gpio.c
hda_verb.c
Kconfig	nb/i945: Drop CHANNEL_XOR_RANDOMIZATION selection	2019-06-14 18:07:30 +00:00
Kconfig.name
mainboard.c	sb/intel/i82801gx: Include chip.h directly	2019-06-05 11:39:14 +00:00
Makefile.inc	arch/x86: Avoid HAVE_SMI_HANDLER conditional with smm-class	2019-07-09 12:43:35 +00:00
mptable.c	intel/945 boards: Use smp_write_pci_intsrc()	2019-06-25 18:48:43 +00:00
romstage.c	cpu/intel: Enter romstage without BIST	2019-08-18 19:03:22 +00:00
smi.h
smihandler.c
thermal.h	mb/lenovo: Unify thermal threshold handling	2019-05-25 12:10:49 +00:00