coreboot-kgpe-d16/src/soc/intel/common
Subrata Banik 13cd3310a5 Braswell: Modify CB to accomodate new FSPv83
Latest FSPv83 made some change related to UPD/VPD
need this patch to align those

BUG=None
TEST=Build and Boot Cyan System
BRANCH=strago-7287.B
CQ-DEPEND=CL:*226897

Original-Change-Id: I6395f3a1f4eecaef14fc4720b00252f9e6143fa3
Original-Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/291394
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Tested-by: Hannah Williams <hannah.williams@intel.com>
Original-Commit-Queue: Hannah Williams <hannah.williams@intel.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/303137
Original-Commit-Ready: John Zhao <john.zhao@intel.com>
Original-Tested-by: John Zhao <john.zhao@intel.com>

Change-Id: I9920eea84b802699454850bfde489668201ffeb6
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/11813
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-10-11 23:55:27 +00:00
..
acpi intel/common: Add common code for filling out ACPI _SWS 2015-09-17 14:13:37 +00:00
acpi.h intel/common: Add common code for filling out ACPI _SWS 2015-09-17 14:13:37 +00:00
acpi_wake_source.c intel/common: Add common code for filling out ACPI _SWS 2015-09-17 14:13:37 +00:00
fsp_ramstage.c cbfs: add struct cbfsf 2015-10-07 10:46:11 +00:00
gma.h Intel/common: Remove copyright address 2015-06-24 17:05:35 +02:00
hda_verb.c Intel Common SOC: Add romstage support 2015-06-24 17:05:06 +02:00
hda_verb.h Remove address from GPLv2 headers 2015-05-21 20:50:25 +02:00
Kconfig intel/common: Add common code for filling out ACPI _SWS 2015-09-17 14:13:37 +00:00
Makefile.inc intel/common: Add common code for filling out ACPI _SWS 2015-09-17 14:13:37 +00:00
memmap.h intel/common: fix stage_cache_external_region() 2015-08-14 15:19:31 +02:00
mrc_cache.c bootstate: remove need for #ifdef ENV_RAMSTAGE 2015-09-04 21:01:58 +00:00
mrc_cache.h Remove address from GPLv2 headers 2015-05-21 20:50:25 +02:00
nvm.c Remove address from GPLv2 headers 2015-05-21 20:50:25 +02:00
nvm.h Remove address from GPLv2 headers 2015-05-21 20:50:25 +02:00
raminit.c intel: update common and FSP cache-as-ram parameters 2015-10-11 23:54:53 +00:00
ramstage.h fsp1_1: provide binding to UEFI version 2015-09-10 17:52:28 +00:00
reset.c Remove address from GPLv2 headers 2015-05-21 20:50:25 +02:00
romstage.c intel: update common and FSP cache-as-ram parameters 2015-10-11 23:54:53 +00:00
romstage.h intel: update common and FSP cache-as-ram parameters 2015-10-11 23:54:53 +00:00
stack.c Intel/common: Remove copyright address 2015-06-24 17:05:35 +02:00
stack.h Intel/common: Remove copyright address 2015-06-24 17:05:35 +02:00
stage_cache.c intel/common: fix stage_cache_external_region() 2015-08-14 15:19:31 +02:00
util.c Intel/common: Remove copyright address 2015-06-24 17:05:35 +02:00
util.h Intel/common: Remove copyright address 2015-06-24 17:05:35 +02:00
vbt.c Braswell: Modify CB to accomodate new FSPv83 2015-10-11 23:55:27 +00:00