coreboot-kgpe-d16/src/soc/amd/mendocino
Karthikeyan Ramasubramanian 1527a12e00 Revert "soc/amd/sabrina: Re-init eSPI in bootblock"
This reverts commit 8b1c6c6cb3. With
updated APCB, eSPI configuration carries over to bootblock. Hence eSPI
does not need to be re-initialized in bootblock.

BUG=b:241426419
TEST=Build and boot to OS in Skyrim with PSP verstage.

Cq-Depend: chrome-internal:4929421
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Change-Id: I426b07329d4a0154d915381c99dcc9746b7a3d7c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66697
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2022-08-14 21:08:01 +00:00
..
acpi
include/soc
psp_verstage
acpi.c
agesa_acpi.c
aoac.c
bootblock.c
chip.c
chip.h
chipset_mendocino.cb
chipset_rembrandt.cb soc/amd/mendocino/chipset_rembrandt: use right chipset folder 2022-08-13 19:26:44 +00:00
config.c
cpu.c
data_fabric.c
early_fch.c Revert "soc/amd/sabrina: Re-init eSPI in bootblock" 2022-08-14 21:08:01 +00:00
espi_util.c
fch.c
fsp_m_params.c
fsp_s_params.c
fw.cfg
gpio.c
i2c.c
Kconfig
Makefile.inc
mca.c
preload.c
reset.c
romstage.c
root_complex.c
smihandler.c
smu.c
uart.c
xhci.c