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Shelley Chen 15316e2321 mb/google/poppy/variants/nami: Invert FP MCU wake signal
GPP_D6 needs to be inverted to enter S0ix because FPMCU_INT_L is
active low.  Keeps device awake otherwise.

BUG=b:119447525, b:115706071
BRANCH=Nami
TEST=Run powerd_dbus_suspend from kernel and make sure see DUT drop into
     S0ix in the EC console.

Change-Id: Iad5df124e2439bbdc078d6a33f8d0510d25ecf6f
Signed-off-by: Shelley Chen <shchen@google.com>
Reviewed-on: https://review.coreboot.org/29650
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-11-17 07:30:15 +00:00
3rdparty 3rdparty/blobs: Update to include QuarkFsp 2018-10-12 23:21:35 +00:00
Documentation mainboard: Add ASRock H81M-HDS 2018-11-16 10:05:26 +00:00
configs soc/intel/apollolake: Add reset code to postcar stage 2018-10-23 07:11:31 +00:00
payloads Linux/Linuxboot: share cmdline and initrd parser 2018-11-16 10:01:20 +00:00
src mb/google/poppy/variants/nami: Invert FP MCU wake signal 2018-11-17 07:30:15 +00:00
util util/cbsftool: allow enabling verbose make output 2018-11-16 12:59:09 +00:00
.checkpatch.conf .checkpatch.conf: Ignore a few more warnings 2018-08-13 12:23:24 +00:00
.clang-format clang-format: change it to better match our style 2018-07-31 23:25:29 +00:00
.gitignore Linuxboot: gitignore build directory 2018-11-05 08:55:11 +00:00
.gitmodules submodules: add FSP mirror as non-default submodule 2018-09-02 03:07:50 +00:00
.gitreview
COPYING
MAINTAINERS MAINTAINERS: Clarify this is about active upstream development 2018-11-14 15:43:41 +00:00
Makefile Makefile: Enable DELETE_ON_ERROR for all targets 2018-08-08 21:57:07 +00:00
Makefile.inc build system: Fix FSP downloading 2018-10-27 11:12:09 +00:00
README.md README: Convert to Markdown 2018-09-16 13:01:58 +00:00
gnat.adc
toolchain.inc Introduce bootblock self-decompression 2018-05-22 02:44:14 +00:00

README.md

coreboot README

coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.

With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.

coreboot was formerly known as LinuxBIOS.

Payloads

After the basic initialization of the hardware has been performed, any desired "payload" can be started by coreboot.

See https://www.coreboot.org/Payloads for a list of supported payloads.

Supported Hardware

coreboot supports a wide range of chipsets, devices, and mainboards.

For details please consult:

Build Requirements

  • make
  • gcc / g++ Because Linux distribution compilers tend to use lots of patches. coreboot does lots of "unusual" things in its build system, some of which break due to those patches, sometimes by gcc aborting, sometimes - and that's worse - by generating broken object code. Two options: use our toolchain (eg. make crosstools-i386) or enable the ANY_TOOLCHAIN Kconfig option if you're feeling lucky (no support in this case).
  • iasl (for targets with ACPI support)
  • pkg-config
  • libssl-dev (openssl)

Optional:

  • doxygen (for generating/viewing documentation)
  • gdb (for better debugging facilities on some targets)
  • ncurses (for make menuconfig and make nconfig)
  • flex and bison (for regenerating parsers)

Building coreboot

Please consult https://www.coreboot.org/Build_HOWTO for details.

Testing coreboot Without Modifying Your Hardware

If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.

Please see https://www.coreboot.org/QEMU for details.

Website and Mailing List

Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:

https://www.coreboot.org

You can contact us directly on the coreboot mailing list:

https://www.coreboot.org/Mailinglist

The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.

coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the "GPL (version 2, or any later version)", and some files are licensed under the "GPL, version 2". For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.

This makes the resulting coreboot images licensed under the GPL, version 2.