88 lines
3.2 KiB
Markdown
88 lines
3.2 KiB
Markdown
# Protectli Vault VP2420
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This page describes how to run coreboot on the [Protectli VP2420].
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## Required proprietary blobs
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To build a minimal working coreboot image some blobs are required (assuming
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only the BIOS region is being modified).
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```eval_rst
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+-----------------+---------------------------------+---------------------+
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| Binary file | Apply | Required / Optional |
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+=================+=================================+=====================+
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| FSP-M, FSP-S | Intel Firmware Support Package | Required |
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+-----------------+---------------------------------+---------------------+
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| microcode | CPU microcode | Required |
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+-----------------+---------------------------------+---------------------+
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```
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FSP-M and FSP-S are obtained after splitting the Elkhart Lake FSP binary (done
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automatically by the coreboot build system and included into the image) from
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the `3rdparty/fsp` submodule.
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Microcode updates are automatically included into the coreboot image by build
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system from the `3rdparty/intel-microcode` submodule.
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## Flashing coreboot
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### Internal programming
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The main SPI flash can be accessed using [flashrom]. Firmware can be easily
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flashed with internal programmer (either BIOS region or full image).
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### External programming
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The system has an internal flash chip which is a 16 MiB soldered SOIC-8 chip.
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This chip is located on the top side of the case (the lid side). One has to
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remove 4 top cover screws and lift up the lid. The flash chip is soldered in
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under RAM, easily accessed after taking out the memory. Specifically, it's a
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KH25L12835F (3.3V) which is a clone of Macronix
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MX25L12835F - [datasheet][MX25L12835F].
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## Working
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- USB 3.0 front ports (SeaBIOS, Tianocore UEFIPayload and Linux)
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- 4 Ethernet ports
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- HDMI, DisplayPort
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- flashrom
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- M.2 WiFi
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- M.2 4G LTE
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- M.2 SATA and NVMe
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- 2.5'' SATA SSD
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- eMMC
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- Super I/O serial port 0 via front microUSB connector
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- SMBus (reading SPD from DIMMs)
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- Initialization with Elkhart Lake FSP 2.0
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- SeaBIOS payload (version rel-1.16.0)
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- TianoCore UEFIPayload
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- Reset switch
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- Booting Debian, Ubuntu, FreeBSD
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## Technology
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```eval_rst
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+------------------+--------------------------------------------------+
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| CPU | Intel Celeron J6412 |
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+------------------+--------------------------------------------------+
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| PCH | Intel Elkhart Lake |
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+------------------+--------------------------------------------------+
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| Super I/O, EC | ITE IT8613E |
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+------------------+--------------------------------------------------+
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| Coprocessor | Intel Management Engine |
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+------------------+--------------------------------------------------+
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```
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## Useful links
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- [VP2420 Hardware Overview](https://protectli.com/kb/vp2400-series-hardware-overview/)
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- [VP2420 Product Page](https://protectli.com/product/vp2420/)
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- [Protectli TPM module](https://protectli.com/product/tpm-module/)
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- [MX25L12835F](https://www.mxic.com.tw/Lists/Datasheet/Attachments/8653/MX25L12835F,%203V,%20128Mb,%20v1.6.pdf)
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- [flashrom](https://flashrom.org/Flashrom)
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